Method and circuit for reducing effects of distributed capacitance associated with large thin film resistors
AssigneeBurr-Brown Corporation
InventorsJohnnie F. Molina, Robert M. Stitt, II
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AssigneeBurr-Brown Corporation
InventorsJohnnie F. Molina, Robert M. Stitt, II
Estimating the term…
A technique for reducing phase shift of a signal passing through a large thin film resistor on an insulating layer includes applying a signal to one terminal of the thin film resistor and also to one end of an underlying doped epitaxial region. The opposite terminal of the thin film resistor is connected to a virtual ground or virtual reference voltage produced by an inverting input of an operational amplifier. The corresponding opposite end of the epitaxial layer is connected to ground or other reference voltage. The voltage gradients produced by currents flowing through both the thin film resistor and the epitaxial layer are equal, so that substantially no incremental charging current flows through capacitance between the thin film resistor and the epitaxial layer. Phase shift of the signal flowing through the thin film resistor is thereby avoided.
A method of reducing the effects of distributed parasitic capacitance on a signal passing through a first resistor disposed on a first surface of an insulating layer, comprising the steps of:
In an integrated circuit resistor structure including an isolated doped layer, an insulative layer on the epitaxial layer, and a high resistance thin film resistor on the insulative layer, means for reducing phase shift of a signal flowing through the thin film resistor, the phase shift reducing means comprising in combination:
An isolating differential amplifier comprising in combination:
Dependencies are inferred from the claim text.