US 4,904,885 AGranted

Substrate bias circuit having substrate bias voltage clamp and operating method therefor

AssigneeMitsubishi Denki Kabushiki Kaisha

InventorsMichihiro Yamada, Hiroshi Miyamoto, Tadato Yamagata, Shigeru Mori, Tetsuya Aono

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Abstract

A substrate bias circuit controls application of a conventional substrate charge pump to the substrate of a semiconductor integrated circuit to prevent latching up of parasitic transistors at the time of turn on of power to the integrated circuit. The substrate bias circuit comprises a filed effect transistor having its source and drain electrodes connected between substrate and charge pump. The gate electrode of the transistor is driven through an RC circuit by the power supply to turn on the transistor for a predetermined time period at the time power is initially applied to the integrated circuit. There is no latching up of the parasitic transistors because application of positive bias voltage to the substrate during turn-on is prevented.

Claims8

Dependent claims

For a semiconductor device including a semiconductor substrate on which field effect transistors are formed, said device including a power supply terminal, a ground terminal and a substrate bias terminal, parasitic capacitance tending to be formed between said power supply terminal and said substrate bias terminal, said device further including a substrate bias generating circuit coupled to said power supply terminal and said ground terminal for generating a substrate bias voltage having a predetermined value and applying said substrate bias voltage to said substrate bias terminal,

a substrate bias voltage clamp circuit, comprising:
switching means connected between said substrate bias terminal and said ground terminal, said switching means including a control electrode for controlling said switching means to be on or off, selectively;
and
control means coupled to said control electrode and responsive to a change of voltage at said power supply terminal for turning said switching means on for a predetermined time duration;
said control means including
(a) capacitor means connected between said power supply terminal and said control electrode, and
(b) discharge means for discharging said capacitor means,
(c) said predetermined time duration being established by a discharge time of said capacitor means by said discharge means.

5 more elements

For a semiconductor device including a semiconductor substrate on which field effect transistors are formed, said device including a power supply terminal, a ground terminal and a substrate bias terminal, parasitic capacitance tending to be formed between said power supply terminal and said substrate bias terminal, said device further including a substrate bias generating circuit for generating a substrate bias voltage having a predetermined value and applying said substrate bias voltage to said substrate bias terminal,

a substrate bias voltage clamp circuit, comprising:
switching means connected between said substrate bias terminal and said ground terminal, said switching means including a control electrode for controlling said switching means to be on or off, selectively;
capacitor means connected between said power supply terminal and said control electrode for turning on said switching means in response to a voltage change at said power supply terminal;
and
discharge means for discharging said capacitor means to turn off said switching means following a time duration determined by values of capacitor means and said discharge means.

2 more elements

Dependencies are inferred from the claim text.