Method of manufacturing an integrated infrared detector

A method of manufacturing an integrated circuit for detecting infrared radiation comprising a semi-isolating substrate provided with a buried PIN photodiode, with a junction field effect transistor J-FET, whose gate is connected to the PIN photodiode, and with a resistor R connected to the transistor, this method including the stop of growing a first structure of epitaxial layers of semiconductor materials, in which a transistor of the J-FET type is formed, the step of growing a second structure of epitaxial layers of semiconductor materials, in which the PIN diode is formed, and the step of etching a pit, in which the second structure of layers is formed, characterized in that the step of etching the pit is carried out after the growth of the first structure of epitaxial layers and is effected through this structure into the substrate, in that the growth of the second structure of epitaxial layers is localized in such a manner that this second structure is limited to the pit, and in that its upper surface is coplanar with that of the first structure of layers, the epitaxial growth of the layers of the first structure and of the layers of the second structure being effected without doping other than the residual growth doping, and in that the regions of the n- and the p-conductivity type of the transistor and of the diode are obtained by a method chosen among implantation and diffusion of species suitable for obtaining the n- and the p-conductivity type, respectively.