Method of generating test data

An apparatus for generating test data for an integrated circuit having a plurality of signal pins having functions of input, output or input/output, a plurality of control pins for inputting an external control signal, and means responsive to the external control signal for selectively setting each signal pin in a desired state according to a specified function thereof, the apparatus comprising:

• a first memory adapted for storing first data representative of the specified function of each individual pin;
• a second memory adapted for storing second data representative of a plurality of pin states corresponding to a plurality of signal states of the external control signal, each pin state being predetermined in accordance with its pin function;
• means for reading the first and second data from the first and second memory respectively;
• means for selectively communicating the external test control signal to the integrated circuit to be tested;
• means responsive to the first and second data for generating third data which represents each pin state of signal pins of the integrated circuit to be tested corresponding to each signal state of the external control signal;
• and
• file means for storing the third data as a test data.

A method of generating test data for an integrated circuit having a signal pin, a control pin for inputting an external control signal for setting each signal pin in a desired state according to a specified function thereof, the method being applied to a test device having a first memory, a second memory, a third memory, and a file, the method comprising the steps of:

• storing first data in a first memory, the first data representing specifications of individual pins;
• storing second data in a second memory, the second data respresenting a plurality of pin states corresponding to a plurality of signal states of the external control signal;
• storing third data in a third memory, the third data representing an electrical limit value of the integrated circuit;
• reading the first and second data from the first and second memory respectively;
• responsive to the first and second data, generating fourth data by means of the test device representative of each pin state of the signal pins of the integrated circuit to be tested corresponding to each signal state of the external test control signal;
• reading the third data from the third memory;
• responsive to the third and fourth data, producing fifth data by means of the test device which represents each pin state of individual signal pins and electrical limit values of the pin in each signal state of the external control signal;
• and
• storing the fifth data into a file as a test data.