Subranging analog-to-digital converter with digital error correction

An analog-to-digital conversion system converting an analog input signal into corresponding digital output values, said conversion system comprising:

• a microprocessor (30);
• a multiplex circuit (24) for applying either a calibration signal (32, 34) or the analog input signal (26) to the conversion system, said multiplex circuit being under the control of said microprocessor;
• a sample and hold circuit (22) to which the signal from said multiplex circuit is applied;
• a first analog-to-digital converter (10) for converting the signal held by said sample and hold circuit to a first digital signal (lD);
• a first digital-to-analog converter (14) to which said first digital signal is applied;
• a digital memory (38) addressed by said first digital signal, said memory outputting predetermined correction values (CV);
• a difference circuit (42, 44, 46) for providing an intermediate analog signal (2IA) which is equal to the difference between the sampled and held input signal and the output (1IA) of said first digital-to-analog converter;
• a second analog-to-digital converter (20) which converts said intermediate analog signal (2IA) into a second digital signal (2D);
• and
• means for combining correction values from the digital memory with the first and second digital signals to provide the system digital output values (50);
• said correction values being determined, under control of the microprocessor, by applying the calibration signal to the conversion system and noting the correct instantaneous value needed to give the desired output when the first digital signal is addressing the stored correction value.

A method for converting an analog input signal into a digital output signal, said method including the steps of:

• converting the analog input signal to a first digital signal;
• converting the first digital signal to a first intermediate analog signal;
• determining the difference between the input signal and the first intermediate analog signal to provide an analog difference signal;
• converting the analog difference signal into a second digital signal;
• addressing a digital memory, containing predetermined digital correction values, with said first digital signal;
• and
• digitally combining the addresses digital correction values provided by said memory with said first and second digital signals to provide said digital output signal.