Bounded lag distributed discrete event simulation method and apparatus
AssigneeAmerican Telephone and Telegraph Company, AT&T Bell Laboratories
InventorBoris D. Lubachevsky
Life of this patent
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AssigneeAmerican Telephone and Telegraph Company, AT&T Bell Laboratories
InventorBoris D. Lubachevsky
Estimating the term…
A discrete event simulation system that avoids all blocking and advances the simulation time in an efficient manner by treating the simulated system as a set of subsystems and simulating the subsystems concurrently. The simulation proceeds iteratively by restricting the simulation of scheduled events for each subsystem at any one time to a chosen simulated time segment (bounded lag) beginning with the lowest simulation time found among the subsystems. With each simulation iteration, an "at risk", demarcation time is evaluated based only on a subset of the subsystems that can potentially affect the simulation at the considered subsystem. Events scheduled for a time earlier than the "at risk" time are simulated. In simulating systems where some subsystems affect other subsystems only through intermediate subsystems, opaque periods can be experienced when, because of the specific process that is being simulated, such an intermediate subsystem "promises" that a particular route emanating from this subsystem would be busy for a set period of time, and thereby also "promises" that no other subsystem can use this route as a conduit to affect other subsystems. That tends to push forward the "at risk" demarcation time.
A method for simulating behavior of a system containing interacting subsystems, where a known minimum delay exists between changes occurring at one of said subsystems and the effects of said changes on others of said subsystems, said simulating being performed with a simulation system having a plurality of interconnected processors with each of said subsystems to be simulated being simulated on one of said processors, wherein the improvement comprises:
A system for performing discrete event simulation of a system having a plurality of interacting subsystems, comprising:
The system of claim 14 wherein said controller system comprises
The system of claim 16 wherein said synchronization processor develops a value of .alpha. based on values of T.sub.j, from a preselected subset of said subsystems, where T.sub.j is the simulation time of the event in subsystem j having the earliest simulation time.
A system for performing discrete event simulation comprising:
A system for performing discrete event simulation comprising:
Dependencies are inferred from the claim text.