Data processing system having unique multilevel microcode architecture

In a data processing system having a source of macroinstructions and a first fixed point arithmetic logic execution means for executing fixed point arithmetic operations and a second floating point arithmetic logic execution means for executing floating point arithmetic operations, said first and second execution means including

• first and second control store means, respectively, for storing microinstructions and for supplying said microinstructions in response to control store addresses supplied thereto;
• said system including common control means responsive to said macroinstructions for providing the same execution control signal to each of said first and second control store means, said control signals comprising at least said control store addresses;
• said first control store means responding to first selected ones of said control store addresses to supply microinstructions to said first execution means for execution only by said first execution means;
• said second control store means responding to second selected ones of said control store addresses to supply microinstructions to said second execution means for execution only by said second execution means;
• and
• said first and second control store means each responding to third selected ones of said control store addresses to simultaneously supply separate microinstructions to said first and said second execution means for execution by their associated first and second execution means, respectively.