Semiconductor device and manufacturing method thereof
AssigneeHitachi, Ltd.
InventorsYutaka Misawa, Osamu Saito
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Abstract
A semiconductor LSI device formed in a semiconductor substrate comprising source/ drain regions of a MOSFET, polycrystalline silicon conductor to be connected to the source/drain region, and a silicide layer interposed between the source/drain region and the polycrystalline silicon conductor. Silicide intrudes into silicon bulk through an oxide film on the silicon substrate surface, assuring contact of low resistance, while lateral resistance of the source/drain region formed in the semiconductor substrate is also reduced. Reduction of contact/connection resistances is accomplished in a high density LSI which is thus imparted with an improved high-speed performance.
Claims23
A semiconductor device comprising:
- a semiconductor substrate having a region doped with impurity of an conductivity type differing from that of said semiconductor substrate, the impurity-doped region including a relatively deep portion intruding into the semiconductor substrate and a relatively shallow portion;
- an insulation layer having a window through which at least part of said relatively deep portion of said impurity-doped region is exposed;
- a silicide layer formed on said relatively deep portion of said impurity-doped region, the relatively deep portion and the silicide layer being substantially aligned with said window;
- and
- at least two electrodes each directly contacting said silicide layer, one of said electrodes being mainly formed of a same main component material as said semiconductor substrate.
A semiconductor device comprising:
- a semiconductor substrate having a region doped with impurity of a conductivity type differing from that of said semiconductor substrate, the impurity-doped region including a relatively deep portion intruding into the semiconductor substrate and a relatively shallow portion;
- an insulation layer having a window through which at least part of said relatively deep portion of said impurity-doped region is exposed;
- a silicide layer formed on said relatively deep portion of said impurity-doped region, said relatively deep portion and said silicide layer having substantially a same shape, in plan view, as said window;
- and
- at least two electrodes each directly contacting said silicide layer, one of said electrodes being mainly formed of a same main component material as said semiconductor substrate, said electrodes having a low connection resistance in the interconnection therebetween and a low contact resistance in the contact between each of the electrodes and the impurity-doped region, as compared to the connection and contact resistances without a silicide layer between the at least two electrodes and the impurity-doped region.
Dependencies are inferred from the claim text.