Current source having a wide range of output voltages
AssigneeU.S. Philips Corporation
InventorMarc Simon
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AssigneeU.S. Philips Corporation
InventorMarc Simon
Estimating the term…
A current source having a wide range of output voltages. The emitter-collector path of a main transistor (T.sub.30) of the npn type, arranged to define the value of the current, is connected in series with the collector-emitter paths of a plurality of cascaded npn-type output transistors (T.sub.31 . . . T.sub.35). Each output transistor (T.sub.31 . . . T.sub.35) is associated with a respective control transistor (T'.sub.31 . . . T'.sub.35) of the opposite type. At least some of the control transistors have their emitters connected to respective collectors of output transistors of a different rank. This yields an output voltage V.sub.s which can range between small values and a value close to the supply voltage V.sub.c.
A current source having a wide range of output voltages, said source comprising:
Dependencies are inferred from the claim text.
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Including plural semiconductor devices as final control devices for a single load: semiconductor devices connected in series
Systems for regulating electric or magnetic variables
Term ended 23 Feb 2009 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
The present invention relates to a current source having a wide range of output voltages, in which source the emitter-collector path of a main transistor, arranged to define the value of the current of the current source, is arranged in series with the emitter-collector path of at least one output transistor.
Such a current source is known from U.S. Pat. No. 3,940,683.
By arranging at least one output transistor in series it is possible to obtain output voltages higher than those normally attainable with the I.C. fabrication process for a transistor, but the maximum output voltage then differs substantially from the available supply voltage, which difference increases as the number of output transistors increases.
The invention will now be described in more detail, by way of non-limitative example, with reference to the accompanying drawings, in which:
FIGS. 1 to 3 by way of illustration show test circuits not previously published by the Applicant, and
FIG. 4 shows an embodiment of the invention.
In FIG. 1 a pnp-type main transistor T.sub.0 has its emitter coupled to a supply voltage source V.sub.c via a resistor R.sub.0 and has its collector connected to the emitter of a transistor T.sub.1 whose collector is connected to the emitter of a transistor T.sub.2. The transistors T.sub.1 and T.sub.2 have their bases connected to two diodes in series, which diodes (D.sub.1, D'.sub.1) and (D.sub.2, D'.sub.2) are poled in the forward direction and serve to ensure that the transistors T.sub.1 and T.sub.2 are operated in the BV.sub.CEO mode for low levels of the output voltage V.sub.s. The number of diodes needed is dictated by the values of the voltages to be handled by these diodes. For this purpose the cathodes of the diodes D'.sub.1 and D'.sub.2 (points A and B respectively) are brought to potentials determined by the current sources (T".sub.1, R".sub.1) and (T".sub.2, R".sub.2) respectively and by the values of the resistors R.sub.1 and R.sub.2, which are respectively arranged between points A and B and the common mode terminal.
A transistor T.sub.3 having its base and collector short-circuited and cooperating with a current source I.sub.3 constitutes a conventional current mirror with the transistors T.sub.0, T".sub.1 and T".sub.2. The output voltage V.sub.s is available on the collector of the transistor T.sub.2. This output voltage varies depending on the load applied to the collector of the transistor T.sub.2.
When the output voltage V.sub.s is low (for example of the order of 0.7 V) the transistors T.sub.1 and T.sub.2 will operate in the BV.sub.CEO mode, while the transistor T.sub.0 remains in a normal mode of operation. When the output voltage V.sub.s approximates to the value of the supply voltage V.sub.c (for example, 30 V) the transistors T.sub.1, T.sub.2 and T.sub.0 will operate in the saturation mode.