Process for the preparation of a multi-layer stacked junction typed thin film transistor using seperate remote plasma
AssigneeCanon Kabushiki Kaisha
InventorKatsumi Nakagawa
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AssigneeCanon Kabushiki Kaisha
InventorKatsumi Nakagawa
Estimating the term…
A process for the preparation of a multi-layers stacked junction typed thin film transister of which electric amplification factor (.beta.) at the time of the base electrode or the emitter electrode being grounded is about 10 and which has an excellent amplifying operation. The process is characterized in that of least the base region is formed by introducing a precursor A generated by activating a gaseous raw material (i) containing at least silicon atom and halogen atom in an activation space (a), a precursor B generated by activating a gaseous raw material (ii) containing at least hydrogen atom in an activation space (6), and if necessary, a precursor C generates by activating a gaseous raw material (iii) containing at least Group III atom or Group V atom of the Periodic Table in either the activation space (a) or the activation space (b), or in an different activation space (c) into a film forming space having a substrate being maintained with a desired temperature therein and chemically reacting them to thereby form a polycrystal silicon film to constitute at least its base region.
A process for preparing a multi-layers stacked junction type thin film transistor having a base region of at least approximately 1000 .ANG. in thickness comprising a polycrystal silicon-containing film having grains of at least 1000 .ANG. in size, comprising forming said polycrystal silicon film by the steps of:
Dependencies are inferred from the claim text.