Surface mounted multilayer memory printed circuit board
AssigneeBull HN Information Systems Inc.
InventorsVictor L. Quattrini, Edwin P. Fisher
Life of this patent
Estimating the term…
Abstract
A multilayer printed circuit memory board is designed and constructed so that the top and bottom layers contain repetitive integrated circuit (IC) chip component hole/pad and interconnection line patterns which are mirror images of one another. The board uses surface mounted techniques in which the integrated chip components of the memory array are mounted and soldered to both sides of the board thereby doubling the density or capacity of the memory board. The integrated circuit memory chips, mounted on the top and bottom of the board, are aligned with each other for sharing common holes or vias in which logically equivalent input signal connections are exchanged in a manner for reducing the number of holes and length of connective wiring.
Claims18
A multilayer printed circuit board for mounting a plurality of integrated circuit packages containing devices, each having a plurality of input pins for receiving a corresponding number of signals, said board comprising:
- a top layer, a bottom layer and a number of intermediate layers, said top and bottom layers having repetitive patterns of pads which are mirror images of each other, each of said pad patterns including pads for plated through holes contained in said circuit board with a predetermined spacing between the centers of said holes;
- a plurality of conductors of minimum length connecting predetermined ones of said pads to said plated through hole pads on said top and bottom layers of said board so that a plurality of said plated through holes are connected by corresponding ones of said conductors to be shared between corresponding integrated circuit packages mounted on said top and bottom layers;
- and,
- said plurality of said integrated circuit packages being mounted on said pads on said top and bottom layers of said board in a paired fashion for enabling an exchange of input pin signal assignments based upon an operational characteristic of said devices included in said packages so as to reduce the number of plated through holes.
A multilayer printed circuit board for mounting a plurality of integrated circuit packages for housing a corresponding number of high density storage devices, each having a plurality of input pins for receiving a corresponding number of signals, said board comprising:
- a top layer surface and a bottom layer surface, said top and bottom layer surfaces having repetitive patterns of pads which are mirror images of each other, each of said pad patterns including pads for mounting said integrated circuit packages and pads associated with plated through holes contained in said circuit board with a predetermined spacing between the centers of said holes;
- a plurality of wiring conductors connecting predetermined ones of said mounting pads to said plated through hole pads on said top and bottom layer surfaces of said board so that a plurality of said plated through holes are connected by corresponding ones of said conductors to be shared between corresponding integrated circuit packages mounted on said top and bottom layer surfaces;
- and,
- said plurality of said integrated circuit packages being mounted on said mounting pads on said top and bottom layer surfaces of said board in a paired fashion occupying like positions for enabling an exchange of input pin signal assignments based upon a predetermined operational characteristic of said storage devices so as to reduce to a minimum, the number of said plated through holes.
Dependencies are inferred from the claim text.