Hand-shake type data transfer control circuit
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsShinji Komori, Hidehiro Takata, Toshiyuki Tamura, Fumiyasu Asai
Life of this patent
Estimating the term…
Loading patent…
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsShinji Komori, Hidehiro Takata, Toshiyuki Tamura, Fumiyasu Asai
Estimating the term…
A hand-shake type control circuit for controlling a data transfer circuit according to the status of a data transfer request signal. The data transfer request signal is initially received at a NAND gate and is also directly coupled to the reset input of are set flip-flop. The output of the NAND gate is used as a first control signal to set the flip-flop and to cause another circuit to activate data transfer. The flip-flop output is a second control signal which is reset only when the transfer request signal changes from an active to an inactive status. The second control signal is coupled to an input of the NAND gate and inactivates the first control signal. Thus, data transfer cannot recur until after the data transfer request signal changes to an inactive status so that parasitic oscillations are eliminated. The flip-flop consists of two, two input NAND gates that are located out of the path of data transfer and that are easier to fabricate than the prior art D flip-flop.
A handshake type control circuit for controlling data transfer at a given stage in response to a send signal, said control circuit comprising:
A method for controlling data transfer at a given stage in response to a send signal, comprising the steps of:
A handshake type control circuit for controlling data transfer at a given stage in response to a send signal, said control circuit comprising:
A handshake type data transfer system for transferring data in response to a data transfer request signal, comprising:
A handshake type pipelined data processing system for transferring data in response to a data transfer request signal, said data processing system having a plurality of consecutive stages including a given stage which comprises:
A handshake type pipelined data processing system having a plurality of consecutive stages for transferring data in response to a data transfer request signal, a given stage including a data transfer circuit and a control circuit coupled thereto for controlling data transfer in response to a send signal, said control circuit comprising:
A handshake type control circuit for controlling data unlatching and latching at a given stage in response to a send signal, said control circuit comprising:
A handshake type data latch system for controlling data unlatching and latching in response to a send signal, comprising:
Dependencies are inferred from the claim text.