Continuously variable digital delay circuit
AssigneesAmerican Telephone and Telegraph Company, AT&T Information Systems Inc.
InventorCecil W. Farrow
Life of this patent
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Abstract
The process of interpolating between two different sampling rates at any point in a sampling interval is obtained using a transversal filter arranged as a continuously variable digital delay line in which the tap coefficients of the delay line are made to be a function of the coefficients of an nth degree polynomial and the delay between the two sampling rates.
Claims6
A digital interpolator for interpolating digital samples of a signal sampled at a first clock rate into a digital sample sampled at a second clock rate, said filter comprising,
- means for storing a plurality of coefficients each having a predetermined magnitude, said coefficients being the coefficients of a predetermined polynomial,
- means for receiving and storing a sequence of said digital samples samples at said first clock rate,
- means for combining individual ones of said sequence of digital samples with respective ones of said coefficients,
- means for determining the time difference between said first and second clock rates, and
- means for generating said interpolated digital sample as a function of each of said combination and the value of said time difference.
A digital interpolator comprising
- means for storing a plurality of coefficients of a predetermined polynomial, said coefficients having respective predetermined magnitudes,
- means for receiving and storing a sequence of digital samples of a signal, said signal being sampled at a first clock rate,
- means for determining the delay between said first clock rate and a second clock rate,
- means for combining each of said digital samples with individual ones of said coefficients based on the order in which said samples are received, and
- means for generating and outputting a digital signal representative of a sample of said signal sampled at said second clock rate as a function of each said combination and said delay.
A method of interpolating digital samples of a signal sampled at a first clock rate into a digital sample sampled at a second clock rate comprising the steps of
- storing a plurality of coefficients each having a predetermined magnitude, said coefficients being the coefficients of a nth-degree polynomial,
- storing a sequence of said digital samples sampled at said first clock rate,
- combining individual ones of said digital samples with respective ones of said coefficients,
- determining the delay between said first and second clock rates, and
- generating said interpolated digital sample as a function of each said combination and the value of said delay.
Dependencies are inferred from the claim text.