Amplifier arrangement with quiescent current control

An amplifier arrangement comprising

• a first and a second output transistor each having a first main terminal, a second main terminal and a control terminal, whose main current paths are arranged in series between two power supply terminals and are further coupled to an output for connecting a load,
• drive means for driving the first and the second transistor, said drive means having a first output which is coupled to the control terminal of the first transistor and a second output which is coupled to the control terminal of the second transistor,
• quiescent current means for causing a quiescent current to flow through the first and the second output transistor, said quiescent current means having first and second current measuring means for generating a first and a second measuring current which are a measure of the current flowing through the first and the second output transistor, respectively, and having feedback means for controlling the quiescent current flowing through the first and the second output transistor by way of the first and the second measuring current,
• characterized in that the feedback means comprise
• a first differential amplifier having a third and a fourth transistor each having a control terminal, a first main terminal and a second main terminal, the second main terminals being coupled to a common point which is coupled to a first current source, the control terminal of the third transistor being coupled to a first point for conveying a voltage which is proportional to the first measuring current and the control terminal of the fourth transistor being coupled to a second point for conveying a voltage which is proportional to the second measuring current,
• a reference circuit comprising a second current source and a fifth transistor having a first main terminal, a second main terminal and a control terminal which is coupled to the first main terminal, and
• a second differential amplifier having a sixth and a seventh transistor each having at least one first main terminal, at least one second main terminal and a control terminal, the control terminal of the sixth transistor being coupled to the second main terminal of the fifth transistor, the control terminal of the seventh transistor being coupled to the common point of the first differential amplifier, and two of the first main terminals of the sixth and the seventh transistor being coupled to the first and the second output of the drive means.