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US 4,805,146 AGranted
Soft write apparatus and method for nondestructive readout core memory
AssigneeQuadri Corporation
InventorsJohn F. Bruder, Sam L. Rainwater
Life of this patent
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Abstract
The sense voltages of an NDRO core memory including two cores per memory bit are increased by using a "soft write" technique wherein one of the two ferrite cores of each memory bit is written into by a smaller write current than the other. This results in a steeper slope toward the knee of the lower part of the hysteresis characteristic of the first core. The steeper slope results in a larger induced voltage for the first core. This increases the difference between the induced voltages of the two cores, thereby increasing the sense voltage to be detected by the sense circuitry.
Claims18
A method of increasing sense voltages of a first NDRO core memory cell including first and second switchable cores each having first and second stable states, the method comprising the steps of:
- (a) forcing a word line current and a digit line current to flow simultaneously in the same direction through the first core and in opposite directions through the second core to set the first core to its first stable state;
- (b) forcing a word line current and a digit line current to flow in opposite directions through the first core and in the same direction through the second core to set the second core to its second stable state, the sum of the amplitudes of the word line current and the digit line current in step (b) being substantially less than the amplitude of the sum of the amplitudes of the word line current and the digit line current in step (a), whereby a hysteresis loop of the second core is substantially smaller than a hysteresis loop of the first core;
- and
- (c) forcing a read current having an amplitude small enough to avoid changing the state of the second core to flow through the first and second cores, causing a substantially larger voltage to be induced across the second core than across the first core, and applying the difference between the voltages induced across the first and second core to an input of a sense amplifier.
1 more element
A system for increasing sense voltages of a first NDRO core memory cell including switchable first and second cores each having first and second stable states, the system comprising:
- (a) means for forcing a word line current and a digit line current to flow simultaneously in the same direction through the first core and in opposite directions through the second core to set the first core to its first stable state;
- (b) means for forcing a word line current and a digit line current to flow in opposite directions through the first core and in the same direction through the second core to set the second core to its second stable state, the sum of the amplitudes of the word line current and the digit line current setting the second core to its second stable state being substantially less than the sum of the amplitudes of the word line current and the digit line current setting the first core to its first stable state, whereby a hysteresis loop of the second core in its second stable state is substantially smaller than a hysteresis loop of the first core in its first stable state;
- and
- (c) means for forcing a read current having an amplitude small enough to avoid changing the state of the second core through to flow the first and second cores, causing a substantially larger voltage to be induced across the second core than across the first core, and applying the difference between the voltages induced across the first and second cores to an input of a sense amplifier.
1 more element
An NDRO core memory system comprising in combination:
- (a) a plurality of memory cells, each including switchable first and second cores each having first and second stable states;
- (b) a word line conductor strung in a first direction through the first and second cores of each of the memory cells;
- (c) word line driver means for selectively producing a first word current flowing in the word line conductor through the first and second cores in the first direction and a second word current flowing in the word line conductor in a second direction opposite to the first direction through the first and second cores;
- (d) a sense-digit line conductor strung through the first and second cores of one of the memory cells so that a digit current flowing in the sense-digit line in the first direction through the first core of that memory cell flows in the second direction through the second core in that memory cell;
- (e) digit driver means for producing first and second digit currents in the sense-digit line conductor flowing in the first and second directions, respectively, through the first core;
- (f) sense amplifier means for sensing the difference between sense voltages induced across the first and second cores by a read current in the word line;
- and
- (g) means in the word line driver means for causing the second word current to be substantially smaller than the first word current so that in every memory write cycle, the one of the first and second cores that is written into a stable state by means of the second word line current has a first hysteresis curve that is substantially smaller than a second hysteresis curve of the other of the first and second cores.
5 more elements
An NDRO core memory comprising in combination:
- (a) an NDRO memory cell including
- i. a first core set to a first stable state and having a first hysteresis curve with a first slope at a point corresponding to the first stable state,
- ii. a second core set to a second state and having a second hysteresis curve with a second slope at a point corresponding to the second stable state, the first slope being substantially different than the second slope;
- (b) means for producing a read current flowing through the first and second cores to excite the first and second cores and thereby produce first and second sense voltages across the first and second cores, respectively, the first and second sense voltages being approximately proportional to the first and second slopes, respectively;
- and
- (c) sense amplifier means for sensing and amplifying the difference between the first and second sense voltages.
3 more elements
A method of operating an NDRO core memory comprising the steps of:
- (a) providing a first switchable core and a second switchable core;
- (b) setting the first core to a first stable state so that the first core has a first hysteresis curve with a first slope at the first stable state;
- (c) setting the second core to a second stable state so that the second core has a second hysteresis curve with a second slope at the second stable state, the first slope being substantially different than the second slope;
- (d) producing a read current through the first and second cores to excite the first and second cores and thereby produce first and second sense voltages across the first and second cores;
- and
- (e) sensing and amplifying the difference between the first and second sense voltages.
3 more elements
Dependencies are inferred from the claim text.