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US 4,804,636 AGranted
Process for making integrated circuits having titanium nitride triple interconnect
AssigneeTexas Instruments Incorporated
InventorsRobert Groover, III, Roger A. Haken, Thomas C. Holloway
Life of this patent
Estimating the term…
Abstract
Disclosed is a process for making VLSI integrated circuits and a local interconnect system, wherein first poly, second poly and moat are all interconnected in any desired pattern by a TiN local interconnect. No masks are required beyond those which would be required for the two poly levels and local interconnect capability anyway.
Claims56
A process for fabricating integrated circuits, comprising the steps of:
- (a) providing a substrate;
- (b) providing device isolation areas in a predetermined pattern to define moat regions in predetermined locations along said substrate;
- (c) forming a first patterned thin film conductor layer having a portion overlying a device isolation area;
- (d) fabricating insulated gate field effect transistors in predetermined locations in said moat regions, said transistors comprising gates formed by a second patterned thin film conductor layer which comprises a large fraction of silicon and overlying said moat regions and comprising source and drain regions formed adjacent the location where said second conductor layer extends over said moat regions, said second conductor layer isolated from said first conductor layer at locations where said second conductor layer overlies said first conductor layer;
- (e) depositing a metal consisting substantially of titanium over exposed portions of said substrate, of said first conductor layer and of said second conductor layer;
- (f) heating said substrate and said titanium metal in a nitrogen-bearing atmosphere, so that said titanium metal reacts with exposed silicon portions of said substrate, of said first conductor layer, and of said second conductor layer to form titanium silicides, and so that other portions of said titanium metal react with said nitrogen atmosphere to form a layer having a large fraction of titanium nitride at the surface thereof;
- and
- (g) removing selected portions of said titanium nitride layer to provide a first local interconnection between said substrate and said first conductor layer, a second local interconnection between said substrate and said second conductor layer, and a third local interconnection between said first conductor layer and said second conductor layer by the remaining portions of said titanium nitride layer.
5 more elements
A process for fabricating integrated circuits, comprising the steps of:
- (a) providing a substrate having device isolation areas at the surface thereof in a predetermined pattern to expose a moat region in predetermined locations, said moat region being semiconducting and comprising silicon;
- (b) forming a first patterned thin film conductor layer comprising silicon, said first conductor layer having a portion overlying a device isolation area;
- (c) forming a second patterned thin film conductor layer comprising silicon, portions of said second conductor layer over said moat region being insulated therefrom by a thin dielectric, and portions of said second conductor layer over said first conductor layer being insulated therefrom by an interlevel dielectric;
- (d) providing a source of titanium over substantially all exposed surfaces, and providing heat in a nitrogen-bearing atmosphere, so that
- said titanium metal reacts with exposed silicon portions of said moat region and said first and second conductor layers to form titanium silicides, and
- portions of said titanium metal not overlying said exposed silicon portions react with said nitrogen atmosphere to form a layer having a large fraction of titanium nitride at the surface thereof;
- and
- (e) removing selected portions of said titanium nitride layer to provide a first local interconnection between a portion of said moat region and said first conductor layer, a second local interconnection between a portion of said moat region and said second conductor layer, and a third local interconnection between said first conductor layer and said second conductor layer by the remaining portions of said titanium nitride layer in a predetermined pattern.
5 more elements
A process for fabricating integrated circuits, comprising the steps of:
- (a) providing a substrate;
- (b) providing device isolation areas in a predetermined pattern to define moat regions in predetermined locations along said substrate;
- (c) forming a first patterned thin film conductor layer in predetermined locations over said substrate, said first conductor layer having a portion overlying a device isolation area;
- (d) fabricating circuit elements in predetermined locations in said moat regions, at least some of said circuit elements comprising conductive portions formed in a second patterned thin film conductor layer at a location overlying a moat region, said second conductor layer isolated from said first conductor layer at locations where said second conductor layer overlies said first conductor layer;
- (e) depositing a metal consisting substantially of titanium overall;
- (f) heating said substrate and said titanium metal in a nitrogen-bearing atmosphere, so that said titanium metal reacts with exposed silicon portions of said substrate, of said first conductor layer and of said second conductor layer to form titanium silicides, and so that other portions of said titanium metal also react with said nitrogen atmosphere to form a layer having a large fraction of titanium nitride at the surface thereof;
- and
- (g) removing selected portions of said titanium nitride layer to provide a first local interconnection between a portion of said moat region and said first conductor layer, a second local interconnection between a portion of said moat region and said second conductor layer, and a third local interconnection between said first conductor layer and said second conductor layer by the remaining portions of said titanium nitride layer in a predetermined pattern.
5 more elements
A process for fabricating integrated circuits, comprising the steps of:
- (a) providing a substrate;
- (b) providing device isolation areas in a predetermined pattern to define moat regions in predetermined locations along said substrate;
- (c) forming a first patterned thin film conductor layer in predetermined locations over said substrate, said first conductor layer having a portion overlying a device isolation area;
- (d) fabricating transistors in predetermined locations in said moat regions, at least some of said transistors comprising control electrodes formed in a second patterned thin film conductor layer at a location overlying a moat region, and conduction paths formed in said moat regions adjacent the location where said second conductor layer overlies said moat region, said second conductor layer isolated from said first conductor layer at locations where said second conductor layer overlies said first conductor layer;
- (e) depositing a metal consisting substantially of titanium overall;
- (f) heating said substrate and said titanium metal in a nitrogen-bearing atmosphere, so that said titanium metal reacts with exposed silicon portions of said substrate, of said first conductor layer and of said second conductor layer to form titanium silicides, and so that other portions of said titanium metal also react with said nitrogen atmosphere to form a layer having a large fraction of titanium nitride at the surface thereof;
- and
- (g) removing selected portions of said titanium nitride layer to provide a first local interconnection between a portion of said moat region and said first conductor layer, a second local interconnection between a portion of said moat region and said second conductor layer, and a third local interconnection between said first conductor layer and said second conductor layer by the remaining portions of said titanium nitride layer in a predetermined pattern.
5 more elements
Dependencies are inferred from the claim text.