Optimal error correction method for zero byte time slot interchange (ZBTSI) clear channel data transmission
AssigneeSiemens Transmission Systems, Inc.
InventorSteven S. Gorshe
Life of this patent
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Abstract
A method and circuit for exploiting the characteristics of the ZBTSI algorithm by using the relationship of the data octet and the octets adjacent thereto to detect error conditions such as violations of the DS1 ones density criteria for detection of transmission channel errors in the ZBTSI decoder. This relationship provides an optimized partial error correction technique which minimizes error multiplication in the PCM transmission channels.
Claims18
The method of detection of data transmission errors in decoding of Zero-Byte Time Slot Interchange (ZBTSI) data, in PCM data transmission comprising the steps of:
- decoding data bytes of said PCM data transmission such that each individual data byte and the data bytes immediately preceding and immediately following said individual data byte are also decoded;
- and wherein said data bytes are each individual octets having eight logic bits which data bytes are arranged in 96-octet groups;
- examining said immediately preceding and immediately following data bytes to determine whether the combination of said decoded individual data byte and either or both of said immediately preceding or immediately following data bytes violates a predetermined criteria;
- and
- deriving a signal indicative of a transmission channel error when said predetermined criteria is violated;
- wherein said predetermined criteria includes the conditions:
- (a) said individual octet contains eight logic zeros, and
- (b) the combination of said individual octet with the immediately preceding and immediately following octets violates the DS1 ones-density criteria.
A ZBTSI decoder having an improved error correction capability comprising:
- means for receiving a PCM data input of ZBTSI encoded telecommunications information, including means for temporarily storing a current octet and the two adjacent octets of said ZBTSI encoded information;
- error detector means for examining the two adjacent octets to determine whether their combination with the current octet is a violation of a predetermined logic criteria;
- and for deriving an error output signal when a violation is present,
- comparator means for comparing an indicated address of the current octet with the actual address of the current octet, and generating an output indicative of whether there is a match;
- control means for causing said current octet to be processed as valid data when an error output signal is present only when the output of the comparator is indicative of a correct address of said current octet.
Dependencies are inferred from the claim text.