Method for error detection
AssigneeSony Corporation
InventorsMasato Tanaka, Takuji Himeno
Life of this patent
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Abstract
This invention provides an error detecting method, wherein upon decoding a data signal which is formed by such a manner that a data word D is formed of a predetermined number of bits of digital signals, a data block is formed of a predetermined number of the data words D which are successive on a recording or transmission medium, one error check code CRC is provided for a sequence within the data block and another error check code for another series which is different from said series within said data block is provided for a sequence of said data blocks all of erroneous data words detected by another error check code P are regarded as being erroneous. By this method, the erroneous data word can be positively detected.
Claims10
A method for error detection and correction, including the steps of decoding a data signal formed with data words each having a predetermined number of bits of digital signals, a plurality of said words being formed into a data block, providing a first error check code for a first series of data words within said data block, a second error check code for another series of data words, different from said first series within said data block, performing an error check procedure using said first error check code, conducting an error check procedure independent of said first error check procedure using said second error check code, and accepting data as erroneous, for a subsequent error correction procedure, when such data is identified as erroneous by one of said two error check codes.
A method for error detection, comprising the steps of decoding a data signal which is formed of words having a predetermined number of bits of digital signals, forming a data block of a predetermined number of said data words which are successive on a recording or transmission medium, providing one error check code for a first series within said data block and providing a plurality of other error check codes for a plurality of series which are different from said first series within said data block for a sequence of said data blocks, and designating as erroneous, prior to error correction, all of the erroneous data words which are detected by said plurality of other error check codes.
A method for error detection, comprising the steps of decoding a data signal which is formed of words having a predetermined number of bits of digital signals, forming a data block of a predetermined number of said data words which are successive on a recording or transmission medium providing one error check code for a first series within said data block and providing a plurality of other error check codes for a plurality of series which are different from said first series within said data block for a sequence of said data blocks, and designating only data words detected by said plurality of other error check codes as being erroneous, simultaneously.
A method for error detection, comprising the steps of decoding a data signal which is formed of words having a predetermined number of bits of digital signals, forming a data block of a predetermined number of said data words which are successive on a recording or transmission medium, providing one error check code for a first series within said data block and providing a plurality of other error check codes for a plurality of series which are different from said first series within said data block for a sequence of said data blocks, and designating as erroneous only a data word which is detected as erroneous by at least one or more error check codes in said plurality of other check codes and which is detected as being correct by the remaining error check codes.
A method for error detection, comprising the steps of decoding a data signal which is formed of words having a predetermined number of bits of digital signals, forming a data block of a predetermined number of said data words which are successive on a recording or transmission medium, providing one error check code for a first series within said data block and providing a plurality of other error check codes for a plurality of series which are different from said first series within said data block for a sequence of said data blocks, and designating as erroneous all of said data words contained in said data block which contains data words judged as being erroneous by said plurality of other check codes.
A method for error detection, comprising the steps of decoding a data signal which is formed of words having a predetermined number of bits of digital signals, forming a data block of a predetermined number of said data words which are successive on a recording or transmission medium, providing one error check code for a first series within said data block and providing a plurality of other error check codes for a plurality of series which are different from said first series within said data block for a sequence of said data blocks, and designating as erroneous all of the data words contained in said data block which contains a data word judged as being erroneous by said plurality of other error check codes, when there is no said data word which is detected as being correct by at least said plurality of other error check codes.
A method for error detection, comprising the steps of decoding a data signal having data words formed of a predetermined number of bits of digital signals, forming a data block of a predetermined number of successive ones of said data words on a recording or transmission medium, providing a first error check code for a first series within said data block and providing a second error check code for a second series which is different from said first series within said data block for a sequence of said data blocks, and designating all erroneous data words detected by said second error check code as being erroneous when an error is detected using said first error check code.
Dependencies are inferred from the claim text.