Apparatus for on-line checking and reconfiguration of integrated circuit chips
AssigneeIntel Corporation
InventorsDavid B. Johnson, Stanley Kenoyer, Mark S. Myers, Sven Nilsson
Life of this patent
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AssigneeIntel Corporation
InventorsDavid B. Johnson, Stanley Kenoyer, Mark S. Myers, Sven Nilsson
Estimating the term…
An error-checking system in which two substantially identical modules are checked by comparing the outputs (43, 63) from the chip logic (41, 61) on each modules with each other. One module is designated a master and the other module is designated a checker. The compare logic (46 or 66) is functional only when the module that it is on is designated as the checker. A control bit designates a module as either a master or a checker. A second control bit indicates when in a first state, that a module designated as a master drives the bus, and when in a second state that a module designated as a master and a module designated as a checker alternately drive the bus. Circuitry distinguishes a warm initialization from a cold initialization. A bit in a register causes a module designated as a master to become a checker upon every alternate warm initialization, so that the module alternates between being a master and a checker only each time a warm initialization occurs.
In an error-checking system in which two substantially identical modules (20, 22) connected to a common bus (23) are checked by comparing the outputs (43, 63) of chip logic (41, 61) on each module with each other, and wherein at any particular time one module is designated a master and the other module is designated a checker, and wherein said outputs (43, 63) are checked by means of a comparator (46 or 66) on said one module designated as a checker, the improvement in at least one of said modules (20) comprising:
Dependencies are inferred from the claim text.