Resistorless, precision current source

A precision current reference circuit comprising:

• (a) a first current mirror providing first and second current paths for the conduction of first and second currents, respectively, said first current mirror establishing a fixed current level relationship between said first and second currents;
• (b) a second current mirror including first and second transistors, said first transistor being coupled in series with said first current path and said second transistor being coupled in series with said second current path, said second current mirror defining a first current/voltage relationship arising from a difference in the current density of said first and second currents through said first and second transistors, respectively, to establish a first voltage differential between respective points in said first and second current paths;
• and
• (c) a third current mirror including third and fourth transistors, said third transistor being coupled in series with said first current path and said fourth transistor being coupled in series with said second current path, said second current mirror defining a second current/voltage relationship, discontinuous with respect to said first current/voltage relationship, arising from a difference in the current density of said first and second currents through said third and fourth transistors, respectively, said third current mirror establishing a second voltage differential at said respective points in said first and second current paths complementary to said first voltage differential at said respective points.

A current level reference coupled between first and second voltage potentials, said source comprising:

• (a) a first stage including first and second transistors, said first and second transistors each having first, second and third terminals, said first terminals being coupled to said first voltage potential and said third terminals being coupled to said second terminal of said second transistor;
• (b) a second stage including third and fourth transistors, said third and fourth transistors each having respective fourth, fifth and sixth terminals, said fourth terminals being respectively coupled to said second terminals, said sixth terminals being coupled to said fourth terminal of said third transistor;
• (c) a third stage including fifth and sixth transistors, said fifth and sixth transistors having respective seventh, eighth and ninth terminals, said seventh terminals being respectively coupled to said fifth terminals of said third and fourth transistors, said eighth and ninth terminals being coupled to said second voltage potential;
• and
• wherein said first, second, third and fourth transistors are FETs and said fifth and sixth transistors are bipolar, the channel width-to-length ratio of said first transistor is related to that of said second transistor by a factor ".gamma.", the channel width-to-length ratio of said third transistor is related to that of said fourth transistor by a factor "1/n", the emitter area of said fifth transistor is related to that of said sixth transistor by a factor "m" and the factors "n" and "m" are related to the factor ".gamma." by the condition that both "n" and "m" are greater than ".gamma.".

Apparatus for providing a precision reference current level, said apparatus comprising:

• (a) first means for providing first and second current paths for the transfer of current, said first means establishing a proportional relationship between the levels of current transferred through said first and second current paths;
• (b) second means, coupled to said first and second current paths, for creating a first voltage difference between a first point in said first current path and a second point in said second current path, said second means including a first transistor provided in said first current path and coupled to said first point for creating a first current density defined voltage drop, and a second transistor provided in said second current path and coupled to said second point for creating a second current density defined voltage drop, said first voltage difference being the difference between said first and second current density defined voltage drops;
• and
• (c) third means, coupled to said first and second current paths, for creating a second voltage difference between said first point in said first current path and said second point in said second current path, said third means including a third transistor provided in said first current path and coupled to said first point for creating a third current density defined voltage drop, and a fourth transistor provided in said second current path and coupled to said second point for creating a fourth current density defined voltage drop, said second voltage difference being the difference between said third and fourth current density defined voltage drops, wherein the levels of current transferred through said first and second current paths tend to respective discrete levels such that said first and second voltage differences are of complementary polarity and common, non-zero magnitude.