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US 4,791,616 AGranted
Semiconductor memory device
AssigneeFujitsu Limited
InventorsMasao Taguchi, Yoshihiro Takemae
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device comprises a memory cell array constituted by a plurality of pairs of memory groups. Two memory gruops of each pair of memory groups have sense amplifiers respectively driven with mutually opposite phases, so as to cancel noise in the bit lines and stabilize the potential of the cell plate.
Claims10
A semiconductor memory device comprising:
- a memory cell array constituted by at least a pair of memory groups;
- a first bit line pair coupled to a first memory group of the memory groups;
- a second bit line pair coupled to a second memory group of the memory groups;
- a first sense amplifier coupled to said first memory group for sensing and amplifying a potential difference in
- said first bit line pair, said first sense amplifier comprising P-channel transistors;
- and
- a second sense amplifier coupled to said second memory group for sensing and amplifying a potential difference in said second bit line pair, said second sense amplifier comprising N-channel transistors,
- said first and second sense amplifiers being driven with mutually opposite phases.
5 more elements
Dependencies are inferred from the claim text.