In a scientific data processor requiring an external executive control program, said scientific data processor having an activity switch which includes an instruction cache buffer to receive the temporarily store data from a main storage, an instruction address selection logic means connected to said instruction cache buffer and an instruction decode and sequencing control means coupled to said instruction cache buffer, apparatus for controlling said activity switch of said scientific processor at the macro instruction level comprising:
- (a) macro code storage means to store a plurality of macro coded instructions and to provide a source thereof;
- (b) macro code control means responsive to a plurality of interrupt signals from various sources and to provide a plurality of control signals;
- (c) a source of data from a main storage means;
- and
- (d) an instruction buffer writer data selector means commonly connected to (a), (b) and (c) to selectively receive information from either said (a) or (c) under the control of (b) such that in response to any one of a plurality of interrupt signals to said macro code control means, said macro code control means causes said instruction buffer write data selector means to selectively shift from the receipt of data from said main storage to the receipt of data from said macro code store means thereby providing macro level control of the activity switch in the scientific processor.