Current controlled solid state switch
AssigneeIntel Corporation
InventorsBranislav Vajdic, Stephen L. Smith
Life of this patent
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Abstract
A current controlled switch to compensate for switching time variations. A compensated current source is configured to operate with a current mirror to set the switching current. The control of the switching current maintains control of the peak switching current in the switch, therein controlling the switching transition time. The speed performance is maintained nearly uniform as circuit and process variations cause switching conditions to change. Applications such as delay lines, output buffers, inverters and ringing oscillators are available using the current controlled switching technique of the present invention. Also, parasitic effects can also be compensated by using the present invention.
Claims10
A current controlled solid state electronic switching circuit for maintaining a substantially uniform switching speed as operating conditions change, comprising:
- a current source for providing a substantially constant first current;
- a first transistor coupled to said current source;
- a second transistor coupled to said first transistor for providing a substantially constant second current and isolated from said current source by said first transistor, but having said second current proportional to said first current;
- switching means coupled to one of said first and second transistors for causing said circuit to be switched on to provide said second current to a load which is coupled to said circuit;
- said second current having its peak current limited to a predetermined value due to said substantially constant first and second currents, wherein limiting maximum value of said peak current attained during switching of said circuit to said predetermined value provides for said substantially uniform switching speed as operating conditions which affect switching speed varies.
A current controlled solid state electronic switching circuit, comprising:
- a compensated current source for providing a substantially constant first current;
- a first metal-oxide-semiconductor (MOS) transistor coupled to said current source;
- a second MOS transistor coupled to said first MOS transistor for functioning as a driver for a load coupled to said second transistor;
- said second transistor having its gate coupled to a gate of said first transistor in a current mirror configuration, wherein said second transistor is isolated from said current source but provides a substantially constnt second current which is proportional to said first current;
- switching means coupled to one of said MOS transistors for causing said circuit to be switched to provide said second current to said load;
- said second current having its maximum peak current limited to a predetermined value due to said substantially constant first and second currents, wherein peak current attained during switching of said circuit is limited to said predetermined value, such that operating conditions which would cause faster switching transitions by drawing higher peak current is controlled to a switching speed determined by said predetermined value.
Dependencies are inferred from the claim text.