US 4,789,956 AGranted

Maximum negative number detector

AssigneeHarris Corporation

InventorEric A. Hildebrandt

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Abstract

Prior to normalizing floating point number, a maximum negative number detector is employed. In order to determine whether a number is a maximum negative number, the inventive scheme examines the left-most (most significant) bit of the bit sequence to be scaled is examined. For positive numbers (where the bit is a zero) the normalize count is carried out without modification. Upon encountering a negative number the bits of the number are examined. The maximum negative number detector contains logic circuitry that counts the displacement from the left-most bit position to the location of the first zero bit from that position. It also counts the displacement from the right-most bit position to the location of the first one bit from that position. For a maximum negative number (one or more ones followed ony by one or more zeros) these two counts will differ by a single bit. This value is then used to prescale the normalization counter so that normalization may proceed.

Claims35

Dependent claims

For use in a data processing apparatus wherein respective sequences of digital data signals representative of numerical values are to be subjected to prescribed arithmetic signal processing operations, an arrangement for analyzing said sequences of digital data signals to detect whether a sequence corresponds to a maximum negative number, wherein said maximum negative number is defined as a number having one or more of a first prescribed digital data signal, followed by one or more of a second prescribed digital data signal, comprising:

first means for examining the contents of a sequence of digital data signals to locate the first occurrence therein of a first prescribed digital data signal relative to one end of said sequence;
second means for examining the contents of said sequence of digital data signals to locate the first occurrence therein of a second prescribed digital data signal relative to the opposite end of said sequence;
and
third means, coupled to said first and second means, for producing an output signal identifying said sequence as corresponding to a maximum negative number in response to the location in said sequence of said first occurrence of said first prescribed digital data signal having a prescribed relationship with respect to the location in said sequence of said first occurrence of said second prescribed digital data signal.

1 more element

For use in a data processing apparatus wherein respective sequences of digital data signals representative of numerical values are to be subjected to prescribed arithmetic signal processing operations, a method of analyzing said sequences of digital data signals to detect whether a sequence corresponds to a maximum negative number, wherein said maximum negative number is defined as a number having one or more of a first prescribed digital data signal, followed by one or more of a second prescribed digital data signal, comprising the steps of:

(a) examining the contents of a sequence of digital data signals and producing a first signal representative of the location of the first occurrence therein of a first prescribed digital data signal relative to one end of said sequence;
(b) examining the contents of said sequence of digital data signals and producing a second signal representative of the location of the first occurrence therein of a second prescribed digital data signal relative to the opposite end of said sequence;
and
(c) producing an output signal identifying said sequence as corresponding to a maximum negative number in response to said first signal, representative of the location in said sequence of said first occurrence of said first prescribed digital data signal, having a prescribed relationship with respect to said signal, second representative of to the location in said sequence of said first occurrence of said second prescribed digital data signal.

1 more element

Dependencies are inferred from the claim text.