Microprocessor emulation apparatus for debugging a microprocessor of an electronic system without utilizing an interrupt signal and a stop signal to temporarily stop an operation of the system

A microprocessor emulation apparatus comprising:

• emulator main frame means for sending out a stop signal, a start signal and a command signal;
• emulator unit means comprising;
• bus exchange means connected to said emulator main frame means for operating upon receipt of said stop signal, said start signal or said command signal from said emulator main frame means;
• microprocessor means for executing upon receipt of a command from said bus exchange means;
• control program means for memorizing an analysis program to analyze an operation of a system under measurement;
• and
• bus means which includes switch means controlled by said bus exchange means for connecting between said bus exchange means, said microprocessor means, said control program means, and said system under measurement to be transmitted said stop signal, said start signal and said command signal from said emulator main frame means via said bus change means:
• wherein
• said emulator unit means comprises;
• M1 detection means for detecting a 1st byte of a command of a program which is transmitted on said bus means from said system and for sending out a detection signal;
• return address memory means for memorizing an address indicated in a 1st byte of said program included in said system under measurement upon receipt of said stop signal to stop executing said program by indications of said microprocessor means and for sending out said address to said system via said bus means to return to said address by indications of said microprocessor means when said start signal is fed thereafter;
• return state memory means for memorizing a value registered in a register included in said microprocessor means upon receipt of said stop signal to make said microprocessor means stop executing said program and for sending out said value registered in said register to said bus means to make said microprocessor means return to a state upon receipt of said stop signal when said start signal is, thereafter, fed;
• and
• idle program means for memorizing a pseudo stopping program to produce a pseudo stopping state in which said microprocessor means does not execute said program included in said system upon receipt of said stop signal;
• whereby
• said bus exchange means exchanges said bus means including said switch means upon receipt of said detection signal from said M1 detection means,
• said pseudo stopping state is produced by said stop signal,
• an analysis state for executing said analysis program memorized in said control program means is produced upon receipt of said command signal and said start signal, and
• a jump command is sent out to produce said pseudo stopping state when said stop signal is fed thereafter,
• so as to read contents memorized in said system and to modify said contents.