Event distribution and combination system

An apparatus for generating a trigger signal in response to a set of first event indication signals, a state of each first event indication signal indicating a state of occurrence of a corresponding event, the apparatus comprising:

• a plurality of event synchronizing circuits, each receiving one of said first event indication signals and an input system clock signal, and generating a second event indication signal synchronized to said system clock signal following receipt of said one first event indication signal;
• a programmable encoding circuit receiving a set of said second event indication signals generated by said plurality of event synchronizing circuits, and generating a set of parallel event encoding signals, each event encoding signal being of a state representing a logical combination of the states of a programmably determined subset of said set of second event indication signals;
• a plurality of conductors for carrying said set of event encoding signals;
• and
• a programmable decoding circuit for generating said trigger signal on detection of a predetermined pattern of states of said event encoding signals carried on a programmably determined subset of said conductors.

An apparatus for generating a trigger signal in response to a set of event indication signals, a state of each event indication signal indicating a state of occurrence of a corresponding event, the apparatus comprising:

• a programmable encoding circuit receiving a set of said event indication signals and generating a set of parallel event encoding signals, each event encoding signal being of a state representing a logical combination of states of a programmably determined subset of said set of event indication signals;
• a plurality of conductors for carrying said set of event encoding signals;
• a programmable decoding circuit for generating an output trigger signal on detection of a predetermined pattern of states of said event encoding signals carried on a programmably determined subset of said conductors;
• and
• a trigger synchronizing circuit for receiving the output of said programmable decoding circuit and a triggering clock signal, and for generating said trigger signal synchronized to said triggering clock signal following receipt of said programmable decoding circuit output signal.

An apparatus for generating a trigger signal in response to a set of first event indication signals, a state of each first event indication signal indicating a state of occurrence of a corresponding event, the apparatus comprising:

• a plurality of event synchronizing circuits, each receiving one of said first event indication signals and an input system clock signal, and generating a second event indication signal synchronized to said system clock signal following receipt of said one first event indication signal;
• a programmable encoding circuit for receiving a set of second event indication signals generated by said plurality of event synchronizing circuits and for generating a set of parallel event encoding signals, each event encoding signal being of a state representing a logical combination of states of a programmably determined subset of said second event indication signals;
• a plurality of conductors for carrying said set of event encoding signals;
• a programmable decoding circuit for generating an output signal on detection of a predetermined pattern of states of said event encoding signals carried on a programmably determined subset of said conductors;
• and
• a trigger synchronizing circuit for receiving the output signal of said programmable decoding circuit and an input triggering clock signal, and for generating said trigger signal synchronized to said triggering clock signal following receipt of said programmable decoding circuit output signal.

An apparatus for generating a plurality of trigger signals in response to a plurality of sets of event indication signals, the state of each binary event indication signal indicating a state of occurrence of a corresponding event, the apparatus comprising:

• a plurality of programmable encoding circuits, each for receiving one of said sets of said event indication signals and for generating a first set of parallel event encoding signals, each event encoding signal being of a state representing a logical combination of the states of a programmably selected subset of said one set of event indication signals;
• means for logically combining the plurality of first sets of parallel event encoding signals generated by said encoding circuits to form a single second set of parallel event encoding signals, each signal of the second set being of a state representing a logical combination of states of signals of one of the first sets;
• and
• a plurality of programmable decoding circuits, each for generating one of said trigger signals on detection of a predetermined pattern of signal states in a programmably determined subset of said second set of event encoding signals.