Method for fabrication of monolithic integrated circuits
AssigneeEaton Corporation
InventorsJoseph A. Calviello, Paul R. Bie, Ronald J. Pomian
Life of this patent
Estimating the term…
Loading patent…
AssigneeEaton Corporation
InventorsJoseph A. Calviello, Paul R. Bie, Ronald J. Pomian
Estimating the term…
During fabrication of monolithic microwave integrated circuits, active devices having sources, gates, drains, and/or Schottky barrier junctions are first provided for an epitaxial layers. Then many layers of metals and oxides are produced thereover in situ without removing the circuit from its environmental chamber. Circuit elements are then defined by processing of the many layers sequentially by photolithography and other processes from the top of the chip downward. Certain combinations of metals, oxides, and processes are selected to enable fabrication of circuits from the top down in this way. This reduces inclusion of contaminating chemical films and particles between the desired layers. Lumped and distributed capacitors, resistors, inductors, transmission lines, contacts, and complete active devices are monolithically defined, with a reduced number of process steps. An all-refractory MESFET is described, having a Schottky barrier gate and nonalloyed ohmic contacts for source and drain producible at room temperatures. Source, gate, and drain can be defined with a single mask. A thinner gold layer is formed for FET contacts than for other circuit conductors and elements by means of a configured tantalum layer buried in a thick gold layer.
A method for producing a monolithic integrated circuit comprising the steps of:
A method for producing a monolithic integrated circuit comprising the steps of:
A method for producing a monolithic integrated circuit comprising the steps of:
A method for producing a monolithic integrated circuit comprising the steps of:
Dependencies are inferred from the claim text.