Matrix-addressed liquid crystal display device with compensation for potential shift of pixel electrodes

A matrix-addressed liquid crystal display device for displaying half-tone pictures comprising:

• a pair of substrates facing each other;
• switch elements arranged in n rows and m columns on the first of said pair of substrates, each of said switch elements comprising a field effect transistor with a gate, drain and source;
• pixel electrodes each connected to said source or drain of each of said field effect transistors;
• n address lines forming a common connection for said respective gates of said field effect transistors in each row;
• m signal lines forming a common connection for respective drains or sources of said field effect transistors in each column;
• a common electrode arranged on the second of said pair of said substrates;
• a liquid crystal layer interposed between said substrates, molecules in said liquid crystal layer being arranged in a predetermined alignment, the alignment being changed in accordance with the voltage applied to said liquid crystal layer, and the capacitance between said pixel electrode and said common electrode being changed in relation to said change of the alignment;
• an address line drive circuit supplying sequential scanning signals to said n address lines;
• a signal line drive circuit supplying parallel display signals to said m signal lines;
• polarity inversion circuit means connected to said signal line drive circuit so that said parallel display signals possess a polarity inversion every frame scanning period;
• wherein the amplitude of the display signals at one polarity constituting the positive potential side with respect to a polarity inversion reference potential and the amplitude of the display signals at the other polarity constituting the negative potential side are set at different values in order to compensate flor the potential shift of said pixel electrodes;
• wherein
• the potential shift depends on the ratio of parasitic capacitance, between said gate and said source or drain of said transistor and said liquid crystal layer capacitance, and between said pixel electrode and said common electrode, wherein said liquid crystal layer capacitance varies with the molecule alignment change owing to the display signal voltage applied to said liquid crystal layer.