Process for formation of shallow silicided junctions
AssigneeTexas Instruments Incorporated
InventorsRobert H. Havemann, Roger A. Haken, Thomas E. Tang, Che-Chia Wei
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AssigneeTexas Instruments Incorporated
InventorsRobert H. Havemann, Roger A. Haken, Thomas E. Tang, Che-Chia Wei
Estimating the term…
A process for forming shallow silicided junctions includes the step of sputtering a layer of titanium (28) over a moat region to cover a gate electrode (18) and a sidewall oxide (22) formed on the sidewalls of the gate electrode (18). The titanium is reacted with exposed silicon regions (24) and (26) to form silicide layers (30) and (32) and then dopant impurities are implanted into the substrate (10) prior to stripping the unreacted titanium. The unreacted titanium (36), (38), or (40) functions as a mask to both offset the implanted regions from the channel region (20) under the gate electrode (18) and also to prevent impurities from entering the substrate at regions outside the defined moat region.
A method for forming junctions in an integrated semiconductor device, comprising:
A method for forming semiconductor junctions in a silicon substrate, comprising:
A method for forming a semiconductor device in a silicon substrate, comprising:
A method forming silicided source/drain regions in an MOS transistor having an active region formed on a substrate and a gate electrode disposed over the active region and separated therefrom by a layer of oxide to define a channel region, comprising:
Dependencies are inferred from the claim text.