US 4,787,097 AGranted

NRZ phase-locked loop circuit with associated monitor and recovery circuitry

AssigneeInternational Business Machines Corporation

InventorRaymond P. Rizzo

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Abstract

Monitor circuitry is placed in the closed loop of a phase-locked loop (PLL) circuit and is capable of detecting the existence of an out of frequency window condition and outputting a control signal when the PLL is operating outside the predetermined narrow frequency window. Recovery circuitry, including a phase frequency detector with a wide acquisition range, temporarily replaces the normal phase detector of the PLL, responsive to the control signal from the monitor circuitry. When the monitor circuitry determines that the PLL is back within the predetermined narrow frequency window, the PLL phase detector is switched back into the PLL loop and the phase frequency detector is removed from the PLL loop. The PLL phase detector is then able to lock in on the incoming data stream. In the preferred embodiment, the monitor and recovery circuitry and connected to a specialized PLL circuit which utilizes a 180 degree phase difference between incoming NRZ data and the recovered clock to strobe the data in the center of the input data pulse, thus improving the data error rate.

Claims17

Dependent claims

A monitor/recovery circuit for monitoring a phase locked loop circuit and for recovering the operation of said phase locked loop circuit inside a predetermined frequency window, said phase locked loop circuit including an input, a phase detector having a narrow acquisition range, a first low pass filter, a voltage controlled oscillator and an output, said monitor/recovery circuit comprising:

monitor means, connected to said output of said phase locked loop and to said phase detector, for monitoring said phase locked loop and for outputting a first control signal when said phase locked loop circuit is operating outside said predetermined frequency window and for outputting a second control signal when said phase locked loop circuit is operating inside said predetermined frequency window, said phase detector being enabled responsive to said second control signal, said monitor means comprising:
a first frequency reference signal,
comparing means connected to said phase locked loop circuit output and said first frequency reference signal for comparing the output frequency of said phase lock loop circuit with said first reference signal frequency;
and
detecting means, connected to said comparing means, for detecting when the difference between said output frequency and said first reference frequency exceeds said predetermined frequency window, thereby generating said first control signal,
said detecting means generating said second control signal when the difference between said output frequency and said first reference frequency does not exceed said predetermined frequency window;
and
recovery means, connected to said monitor means and to an input of said low pass filter and enabled responsive to said first control signal, for recovering the operation of said phase locked loop circuit when said phse locked loop circuit is inside said predetermined frequency window, said recovery means comprising:
a first phase frequency detector having a wide acquisition range and having a first and second input and an output, said first input connected to said first frequency reference signal and said second input connected to said output of said phase locked loop circuit.

6 more elements

A circuit for extracting clocking information from a NRZ data stream, comprising:

a phase locked loop circuit having an input for said NRZ data stream and an output, comprising a phase detector having a narrow acquisition range, a first current pump connected to said phase detector, a low pass filter connected to said first current pump, and a voltage controlled oscillator connected to said low pass filter and coupled to said phase detector;
monitor means, connected to said phase detector and said output of said phase locked loop circuit, for monitoring said phase locked loop and for outputting a first control signal when said phase locked loop circuit is operating outside a predetermined narrow frequency window and for outputting a second control signal when said phase locked loop circuit is operting inside said predetermined frequency window;
and
recovery means, connected to said monitor means and to an input of said low pass filter, and enabled responsive to said first control signal for recovering the operation of said phase locked loop circuit when said phase locked loop circuit is inside said predetermined frequency window,
said phase detector being enabled responsive to said second control signal;
wherein said phase detector is a set/reset latch.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 07/013,598Filed 11 Feb 1987
Granted: 22 Nov 1988
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H03L 7/113
For assuring initial synchronisation or for broadening the capture range: using frequency discriminator
H03L 7/095
Concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal: using a lock detector
Y10S 331/02
Oscillators: phase locked loop having lock indicating or detecting means
H03L
Automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or