Non-volatile shadow storage cell with improved level shifting circuit and reduced tunnel device count for improved reliability
AssigneeSGS-Thomson Microelectronics S.A.
InventorHorst Leuschner
Life of this patent
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Abstract
A non-volatile storage cell utilizing improved level shifting circuitry to charge and discharge at least a single isolation device, preferably of the Fowler-Nordheim tunneling type, wherein such level shifting input/output circuit is fully static providing for the elimination of any requirement for a gate booster capacitor and allows the high voltage source to replace any long term charge loss. The use of silicon area is reduced.
Claims4
In a non-volatile shadow memory cell comprising a non-volatile storage element and at least one isolation element for charging and discharging the at least one non-volatile storage element, the improvement comprising in combination:
- level shifting means for charging and discharging the non-volatile storage element, said level shifting means for charging and discharging the non-volatile storage element further comprising:
- a latching circuit, said latching circuit having a first and a second input drive terminal, one of said first and second input terminals also being an output terminal;
- a coupling capacitor, said coupling capacitor being connected from said output terminal of said latching circuit to a control electrode of the nonvolatile storage element;
- a first drive transistor, said first drive transistor having a gate electrode connected to a first logic signal source;
- a second drive transistor, said second drive transistor having a gate electrode connected to a second logic signal source, said first and said second logic signal sources being complementary each to the other;
- said first drive transistor having a first electrode connected to said first input terminal of said latching circuit, and said first drive transistor having a second electrode connected to ground;
- and
- said second drive transistor having a first electrode connected to said second input terminal of said latching circuit, and said second drive transistor having a second electrode connected to ground.
Dependencies are inferred from the claim text.