Technique for determining maximum physical memory present in a system and for detecting attempts to access nonexistent memory

A method of determining if an addressed memory location is physically present within a system, each time an address is presented to memory within a system capable of containing one or more memory modules, wherein each memory module contained in the system can be one of several different types with every type of memory module having a predetermined number of memory locations, said method comprising the steps of:

• A. constructing said system to have a plurality of positions to which each of said memory modules can be physically connected;
• B. receiving from each of said plurality of positions a first signal which when in a first state indicates that a one of said memory modules is physically present and when in a second state indicates that one of said memory modules is not physically present;
• C. receiving from each of said plurality of positions a number of signals which are in a different state for each one of said several different types of memory modules;
• D. computing an address of a last memory location physically present in memory based on the states of said first and said number of signals from said plurality of memory modules;
• E. comparing said address presented to memory with said address of a last memory location physically present in memory;
• F. generating a third signal in a first state if the result of said compare indicates that said address presented to memory corresponds to a location physically present in memory and generates said third signal in a second state if said compare indicates that said address presented to memory corresponds to a location not physically present in memory.
• G. writing a predetermined value in each memory location of each memory module;
• H. reading the contents of said each memory location by applying consecutive addresses;
• I. storing a first address of said each memory module for which no predetermined value was read;
• and
• J. comparing the corresponding high order bits of said first address of said each memory module to identify a memory module type having the least number of locations.

An apparatus for determining an amount of memory physically present within a system, said system capable of containing one or more memory modules, wherein each of said one or more memory modules contained in said system can be one of several different types, wherein each type of memory module has a predetermined number of memory locations, said apparatus comprising:

• A. a plurality of connector means each connecting to one of said plurality of memory modules, each of said plurality of connector means generating a first signal and a number of signals;
• B. a first receiving means coupled to said plurality of connector means for receiving said first signal from each of said connector means, said first signal when in a first state indicating that one of said memory modules is physically connected to a one of said connector means and when in a second state indicating that a one of said memory modules is not physically connected to said connector means;
• C. a second receiving means coupled to said plurality of connector means for receiving said number of signals, said number of signals having different types of memory modules which can be connected to said connector means;
• D. a computing means coupled to said first and said second receiving means for computing the amount of memory physically present in said system by using logic circuit means included in said first and said second receiving means and responsive to each state of said number of signals corresponding to a predetermined amount of memory if its corresponding first signal is in said first state;
• E. a memory writing means coupled to each of said plurality of memory modules for writing a predetermined value into at least one location of said each of said plurality of memory includes;
• F. a memory reading means for reading back said predetermined value for said at least one location of said each of said plurality of memory includes;
• G. a computing mean coupled to said memory reading means for computing said predetermined value written into said at least one location with said predetermined value read from said at least one location;
• and
• H. a verifying means coupled to said computing means for indicating a successful access to each possible of said each of said plurality of memory modules that is indicated to be physically present, and that successful access is made to any possible of said each of said plurality of memory modules that is computed not to be physically present.

An apparatus for determining if an addressed memory location is physically present within a system, said system capable of containing one or more memory modules, wherein each of said one or more memory modules contained in said system can be one of several different types, wherein each type of memory module has a predetermined number of memory locations, said apparatus comprising:

• A. a plurality of connector means each connecting to one of said plurality of memory modules, each of said plurality of connector means generating a first signal and a number of signals;
• B. a first receiving means coupled to said plurality of connector means for receiving said first signal from each of said connector means, said first signal when in a first state indicating that one of said memory modules is physically connected to a one of said connector means and when in a second state indicating that a one of said memory modules is not physically connected to said connector means;
• C. a second receiving means coupled to said plurality of connector means for receiving said number of signals, said number of signals having different states for each one of several different types of memory modules which can be connected to said connector means, said number of signals including, a second signal in a first state specifying a first memory chip capacity and in a second state specifying a second memory chip capacity, a third signal in a first state specifying a first memory module capacity and in a second state specifying a second memory module capacity and a fourth signal specifying that a second memory module is present;
• D. a computing means for computing an address of a last memory location physically present in memory based on the states of said first and number of signals from said plurality of memory modules;
• E. a comparing means coupled to said computing means for comparing said address presented to memory with said address of a last memory location physically present in memory;
• F. a generating means coupled to said comparing means for generating a third signal in a first state if the result of said compare indicates that said address presented to memory corresponds to a location physically present in memory and generates said third signal in a second state if said compare indicates that said address presented to memory corresponds to a location not physically present in memory;
• G. a memory writing means coupled to each of said plurality of memory modules for writing a predetermined value into at least one location of said each of said plurality of memory includes;
• H. a memory reading means for reading back said predetermined value for said at least one location of said each of said plurality of memory includes;
• I. a computing mean coupled to said memory reading means for computing said predetermined value written into said at least one location with said predetermined value read from said at least one location;
• and
• J. a verifying means coupled to said computing means for indicating a successful access to each possible of said each of said plurality of memory modules that is indicated to be physically present, and that successful access is made to any possible of said each of said plurality of memory modules that is computed not to be physically present.