Apparatus for estimating the square of digital samples
AssigneeRCA Licensing Corporation
InventorCharles B. Dieterich
Life of this patent
Estimating the term…
Abstract
Apparatus for estimating the square of a multi-bit digital sample having a value (A+B) segments the sample into a most significantf bit (MSB) portion having the value A, and a least significant bit (LSB) portion having a value B. The LSB portion is added back to the sample to produce a sample having a value of (A+2B), which sample is applied to the multiplicand input of a multiplier circuit. The MSB portion of the sample is coupled to the multiplier input of the multiplier circuit which produces the product (A.sup.2 +2AB) as an estimate of the square of the sample. Estimating the square in this manner significantly reduces the size of the multiplier circuit.
Claims11
Apparatus for producing an estimate of the square of a number represented by a multi-bit digital serial-bit sample wherein said multi-bit digital sample comprises N-bits including L least significant bits (LSB's) and (N-L) most significant bits (MSB's) where N and L are intergers, said apparatus comprising:
- an input terminal for receiving said multi-bit digital sample;
- a multiplier circuit having a parallel bit multiplier input terminal and a serial multiplicand input terminal, and having an output terminal for providing said estimate;
- a serial shift register having an input coupled to said input terminal for receiving said multi-bit digital sample, having a serial output terminal, and having (N-L) parallel output terminals for providing said (N-L)-MSB's;
- means for coupling said serial output terminal to said serial multiplicand input terminal;
- means for coupling said (N-L) parallel output terminals to said parallel bit multiplier input terminal.
Apparatus for producing an estimate of the square of a number represented by a multi-bit digital sample wherein said multi-bit digital sample comprises N-bits representing values (A+B) including L least significant bits (LSB's) representing value B and (N-L) most significant bits (MSB's) representing value A where N and L are integers, said apparatus comprising:
- an input terminal for receiving said multi-bit digital sample;
- a multiplier circuit having multiplier and multiplicand input terminals, and having an output terminal for providing said estimate;
- means coupled to said input terminal for applying said (N-L)-MSB's to said multiplier input terminal;
- means coupled to said input terminal for providing said L-LSB's of said multi-bit digital sample;
- an adder having a first input terminal coupled to said means for providing said L-LSB's, having a second input terminal, and having an output terminal coupled to said multiplicand input terminal;
- means, coupled to said input terminal, for applying said N-bit multi-bit digital sample to the second input terminal of said adder;
- and
- wherein the estimate of the square of the value (A+B) corresponds to A.sup.2 +2AB.
Apparatus for producing an estimate of the square of a number represented by a multi-bit digital sample, wherein said multi-bit digital sample comprises N-bits including L least significant bits (LSB's) and (N-L) most significant bits (MSB's) where N and L are integers, said apparatus comprising:
- an input terminal for receiving said multi-bit:
- digital sample;
- a multiplier circuit having multiplier and multiplicand input terminals, and having an output terminal for providing said estimate;
- means coupled to said input terminal for applying said (N-L)-MSB's to said multiplier input terminal;
- means coupled to said input terminal for providing said (N-L)-MSB's of said multi-bit digital sample;
- a subtractor circuit having a subtrahend input. terminal coupled to said means for providing said (N-L)-MSB's, having a minuend input terminal, and having an output terminal coupled to said multiplicand input terminal;
- and
- means, coupled to said input terminal, for applying said N-bit multi-bit digital sample to the minuend input terminal.
Apparatus for producing an estimate of the square of a number represented by a multi-bit digital serial-bit sample wherein said multi-bit digital sample comprises N-bits representing value (A+B) including L least significant bits (LSB's) representing value B and (N-L) most significant bits (MSB's) representing value A where N and L are intergers, said apparatus comprising:
- an input terminal for receiving said multi-bit:
- digital sample;
- a multiplier circuit having a parallel-bit multiplier input terminal and a serial multiplicand input terminal, and having an output terminal for providing said estimate;
- a serial shift register having an input coupled to said input terminal for receiving said multi-bit digital sample, having a serial output terminal, and having (N-L) parallel output terminals for providing said (N-L)-MSB's;
- means for coupling said (N-L) parallel output terminals to said parallel-bit multiplier input terminal;
- means for coupling said serial output terminal to said serial multiplicand input terminal including means for adding said L-LSB's of said N-bit sample to said N-bit sample to develop a multiplicand input sample equal to (A+2B) and the estimate of the square corresponds to A.sup.2 +2AB.
Dependencies are inferred from the claim text.