Antisaturation circuit for integrated PNP transistor with intervention characteristic definable according to a preset function
AssigneeSGS Microelettronica S.p.A.
InventorsRoberto Gariboldi, Marco Morelli
Life of this patent
Estimating the term…
Loading patent…
AssigneeSGS Microelettronica S.p.A.
InventorsRoberto Gariboldi, Marco Morelli
Estimating the term…
Described is an antisaturation circuit for an integrated PNP transistor characterized by a comparator circuit comprising two transistors and a current generator whose output current corresponds to a pre-established function, e.g., an exponential function, of the emitter current of said transistor. The changing of state of the comparator circuit, as determined by said pre-established function of said current generator, is determined by the drop of the V.sub.CE voltage of the transistor below a preset minimum value, with a portion of the conduction current of one of the two transistors of the comparator circuit utilized for increasing the forced .beta. of the transistor. This limits the degree of its saturation, as well as the leakage current toward the substrate.
An antisaturation circuit for an integrated PNP transistor having an extremely low DC current gain under conditions of strong imbalance, wherein said circuit comprises a comparator circuit formed by at least two transistors and at least a first generic current generator capable of determining a pre-established maximum threshold current through itself and therefore through the conducting transistor of said comparator circuit;
An antisaturation circuit for an integrated PNP transistor having an extremely low DC current gain under conditions of strong imbalance, said PNP transistor including an emitter, a base and a collector, wherein said circuit comprises:
An integrated voltage regulator utilizing a first PNP transistor as a series regulator, said PNP transistor having an extremely low DC current gain under conditions of strong imbalance, and having a regulation loop comprising an operational amplifier for comparing the output or collector voltage of said first PNP transistor with a reference voltage and consequently regulating the current through a base of a NPN driver transistor of said first PNP transistor, said regulator comprising:
Dependencies are inferred from the claim text.