Plasma enhanced chemical vapor deposited vertical silicon nitride resistor
AssigneeIntel Corporation
InventorsLeopoldo D. Yau, Shih-Ou Chen, Yih S. Lin
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Abstract
An improved resistor for use in MOS integrated circuits. An opening is formed in an insulative layer which separates two conductive regions. A plasma enhanced chemical vapor deposition of passivation material such as silicon-rich silicon nitride is deposited in the window, contacting both conductive regions and providing resistance in a vertical direction between these regions.
Claims11
A process for fabricating a resistor in a semiconductor device between two conductive regions, comprising the formation of plasma enhanced chemical vapor deposited (PECVD) semi-insulative film, comprised of silicon-enriched silicon nitride formed of silane, nitrogen and ammonia, between said conductive regions, and said film contacting both said conductive regions and providing electrical resistance between said conductive regions, whereby a resistor element is fabricated.
A process for fabricating an integrated circuit resistor, comprised of silicon-enriched silicon nitride, between two conductive regions which are separated by an insulative layer, comprising the steps of:
- forming a first conductive region on a substrate;
- forming a first insulative layer on said first conductive region;
- opening a window in said first insulative layer;
- forming a semi-insulative film, comprised of silicon-enriched silicon nitride having a mixture of silane, nitrogen and ammonia and formed by a plasma enhanced chemical vapor deposition technique in said window, said film contacting said first conductive region;
- forming a second conductive region on said film;
- whereby a silicon-enriched silicon nitride resistor element is fabricated between said conductive regions.
A process for fabricating a silicon-enriched silicon nitride resistor in a semiconductor device, comprising the steps of:
- forming a first conductive layer on a substrate;
- forming a first insulative layer on said first conductive layer;
- opening a window in said first insulative layer;
- forming a film of silicon-enriched silicon nitride in said window, said silicon-rich silicon nitride film being deposited in said window using a plasma enhanced chemical vapor deposition technique, said silicon-rich silicon nitride film contacting said first conductive layer;
- forming a second conductive layer on said silicon-rich silicon nitride film, said second conductive layer contacting said silicon-rich silicon nitride film.
A process for fabricating a silicon-enriched silicon nitride integrated circuit resistor comprising the steps of:
- growing a gate-oxide layer on a substrate;
- removing a portion of said gate-oxide layer to expose said substrate;
- forming a polysilicon layer on said gate-oxide and said portion of exposed substrate;
- doping said polysilicon layer by phosphorus diffusion wherein a buried contact region is formed in said portion of exposed substrate;
- forming a layer of tungsten-silicon on said polysilicon layer;
- growing an oxide layer on said tungsten-silicon layer;
- forming an insulative layer on said oxide layer;
- opening a window in said insulative layer and said oxide layer, wherein said opening extends to said tungsten-silicon layer;
- forming a film of silicon-enriched silicon nitride in said window, said silicon-enriched silicon nitride film being deposited in said window using a plasma enhanced chemical vapor deposition technique, said silicon-enriched silicon nitride film contacting said tungsten-silicon layer;
- forming a conductive layer on said silicon-enriched silicon nitride film, said conductive layer having a titanium layer and an aluminum-silicon layer.
Dependencies are inferred from the claim text.