Method and device for regenerating the integrity of the bit rate in a plesiosynchronous system
AssigneeLMT Radio Professionnelle
InventorsAndre Judeinstein, Pierre Lagoutte
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Abstract
The network of the invention comprises, in the transmitter, a "marker" generator which inserts bits of a cyclical sequence into the binary data flow and, in the receiver, a marker processing circuit by which it is possible to identify the start of the marker cycle in order to re-justify the useful data signal in accordance with the detection of this start of a cycle.
Claims17
A method for the end-to-end regeneration of binary integrity in a link set up through a plesiosynchronous network, comprising the steps of:
- transmitting frames consisting of several time intervals from a transmitter over said link;
- multiplexing useful data bits with at least one cyclical signal marker bit in synchronism with said data bits to form said frames being transmitted;
- receiving said frames from said link at a receiver;
- demultiplexing said received frames to separate said useful data bits and said cyclical signal marker bits;
- unambiguously identifying the start of a cycle of said cyclical signal bit and detecting errors from the identification of said cyclical signal marker bits;
- and
- regenerating the bits transmitted utilizing errors detected from the identification of the cyclical signal marker bits.
A device for the regeneration of binary integrity in a link set up through a plesiosynchronous network which transmits frames of several time intervals comprising:
- a source transmitter for transmitting over said link;
- a bit cyclical signal generator for producing marker signals having a bit cycle;
- a multiplexer connected to said bit cyclical signal generator in said source transmitter for multiplexing said marker signals with data bits;
- an addressee receiver including a demultiplexer for receiving signals from said source transmitter or said link;
- said demultiplexer for separating said data bits and said marker signal;
- a marker processing device connected to the demultiplexer for identifying the start of said bit cycle and regenerating said data bits according to the detection of said start.
Dependencies are inferred from the claim text.