Addressing multiple storage spaces

A data processing apparatus operating under program control in a first state, having a first domain of facilities within the apparatus including first domain storage space, or in a second state, having a second domain of facilities within the apparatus including second domain storage space, for processing a sequence of instructions normally in the first state, the sequence of instructions including an instruction that results in a branch to the second state for execution of a program of instructions in the second domain, comprising:

• an instruction register, connected to receive instructions in the first and second states, including a plurality of fields, at least one field identifying a location for address information for an operand;
• decoding means, responsive to an instruction in the first state, for decoding the instruction to generate a control code including a branch signal and a domain access control signal;
• means, connected to receive and responsive to the branch signal, for branching program control of the apparatus to the second state to enter said program of instructions in the second domain;
• domain access control register means, connected to receive the domain access control signal upon a branch to the second state, for holding the domain access control signal during execution of the program of instructions in the second state;
• addressing means, in communication with the instruction register, for supplying an address of an operand;
• interface means, in communication with the domain access control register means, and the instruction register, for generating at least one access control signal during execution of the program of instructions in response to the domain access control signal and the one field of the instruction;
• storage means, connected to receive the address, for storing operands at locations identified by addresses from the first and second domain storage spaces including means, responsive to the access control signal for translating the address.

A data processing apparatus operating under program control in a user state, having a user domain of facilities within the apparatus including domain storage space, or in a control state, having a system storage space, and having means for generating a program status word in response to execution of instruction for controlling accesses to the domain storage space and the system storage space, for processing a sequence of instructions normally in the user state, the sequence of instructions including an instruction that results in a branch to the control state for execution of an emulation program of instructions in the system storage space, comprising;

• an instruction register, connected to receive instructions in the user and control states, including a plurality of fields, at least one field identifying a location for address information for an operand;
• decoding means, responsive to an instruction in the user state, for decoding the instruction to generate a control code, the control code including a branch signal and a domain access control signal;
• means, connected to receive and responsive to the branch signal, for branching program control of the apparatus to the control state to enter the emulation program;
• domain access control register means, connected to receive the domain access control signal upon a branch to the control state, for holding the domain access control signal during execution of the emulation program;
• domain status register means, connected to receive a status indicator from the program status word for the instruction in the user state being emulated in the control state, for holding the status indicator during execution of the emulation program;
• and
• addressing means, in communication with the instruction register, for supplying an address of an operand;
• interface means, in communication with the domain access control register means the domain status register means, for generating at least one access control signal during execution of the emulation program of instructions in response to the status indicator and the domain access control signal;
• storage means, connected to receive the access control signal and the address, for storing operands at locations identified by addresses from the user domain storage space and system storage space including means, responsive to the access control signal for translating the address of said operand.

A data processing apparatus operating under program control in a first state, having a first domain of facilities within the apparatus including first domain storage space, or in a second state having a second domain of facilities within the apparatus including second domain storage space, for processing a sequence of instructions normally in the first state, the sequence of instructions including an instruction that results in a branch to the second state of execution of a program of instructions in the second domain, comprising:

• first means, responsive to an instruction in the first state, for generating a plurality of fields, including a control code comprising a branch signal, a domain access activation signal, an address of an operand and at least a first field identifying a location for address information of the operand;
• interface means, responsive to the domain access activation signal and the first field in an instruction for generating a first domain access signal;
• and
• means coupled to said interface means and the first means, and responsive to the first domain access signal for translating the address to first domain address space during processing of an instruction in the second state.

A data processing apparatus operating under program control in a first state, having a first domain of facilities within the apparatus including first domain storage space, or in a second state, having a second domain of facilities within the apparatus including second domain storage space, for processing a sequence of instructions normally in the first state, the sequence of instructions including an instruction that results in a branch to the second state for execution of a program of instructions in the second domain, comprising:

• first means, responsive to an instruction in the first state, for generating a plurality of fields, including a control code comprising a branch signal and, a domain access control signal, an address of an operand and at least a first field identifying a location for address information of the operand;
• domain access control register means, connected to receive the domain access control signal upon a branch to the second state, for holding the domain access control signal during execution of the program of instructions in the second state;
• interface means, in communication with the domain access control register means, and the first means, for generating at least one access control signal during execution of the program of instructions in response to the domain access control signal and the first field of the instruction;
• and
• storage means coupled to said first means and responsive to the access control signal for translating the address of the operand.

A data processing apparatus operating under program control in a user state, having a user domain of facilities within the apparatus including domain storage space, or in a control state, having a system storage space, and having means for generating a program status word in response to execution of instruction for controlling accesses to the domain storage space and the system storage space, for processing a sequence of instructions normally in the user state, the sequence of instructions including an instruction that results in a branch to the control state for execution of an emulation program of instructions in the system storage space, comprising:

• first means, responsive to an instruction in the user state, for decoding the instruction to generate a plurality of fields, including a control code comprising a domain access control signal, an address of an operand and at least one field identifying a location for address information of the operand;
• domain access control register measns, connected to receive the domain access control signal upon a branch to the control state, for holding the domain access control signal during execution of the emulation program;
• domain status register means, connected to receive a status indicator from the program status word for the instruction in the user state being emulated in the control state, for holding the status indicator during execution of the emulation program;
• and
• interface means, in communication with the domain access control register means, the domain status register means, for generating at least one access control signal during execution of the emulation program of instructions in response to the status indicator and the domain access control signal;
• and
• storage means, coupled to said first means and responsive to the access control signal, for translating the address of said operand.