Sampled data amplitude detector as for an AGC multiplier

#This invention relates to circuitry for detecting the peak amplitude of a sampled data signal.

#This invention will be described in the environment of a digital television receiver, but it will be recognized to be applicable to a much broader range of applications utilizing peak detecting of sampled data signals.

#Digital television receivers currently commercially available include analog circuitry to receive conventional broadcast TV signals and develop baseband composite TV signals. The baseband composite signal is coupled to an analog-to-digital converter (ADC) which translates the analog signals to pulse code modulated (PCM) binary signals. The PCM signals are processed in digital or binary arithmetic circuitry to separate and process the luminance and chrominance components of the composite signal. The processed digital luminance and chrominance components (color difference signals) are subsequently converted to analog signals which are coupled to analog matrixing circuitry for developing RGB color signals to drive a kinescope.

#FIG. 1 is a block diagram of a portion of a digital TV receiver including sample clock generating phase-lock-loop circuitry incorporating AGC circuitry.

#FIGS. 2 and 3 are block diagrams of amplitude detectors embodying the present invention and which may be used in the AGC circuitry of FIG. 1.

#FIG. 4 is a waveform diagram useful in understanding the advantages of the invention.

#In the drawings, broad arrows interconnecting circuit elements represent multiconductor parallel bit data paths and narrow arrows represent single wire conductors for single bit or serial digital signals or analog signals.

#Refer to the waveforms of FIG. 4. Waveform (a) is an analog representation of a portion of a color burst reference signal. Waveform (b) is a clock signal which is phase and frequency locked to the burst signal with the clock frequency being four times the color burst frequency. The clock signal of waveform (b) has the desired phase relationship to waveform (a). If waveform (a) is sampled by an analog-to-digital converter clocked by the clock signal of waveform (b), the values produced by the ADC correspond to the sequence of amplitude values denoted A.sub.1, A.sub.2, A.sub.3, A.sub.4, etc. It can be seen that the magnitude of the samples A.sub.2 and A.sub.4 developed by clock phases .phi..sub.2 and .phi..sub.4 correspond to the peak value of the burst signal. Thus, when the clock is phase locked to the color burst signal as shown, the amplitude of the color burst signal is equal to the magnitude of the samples developed by either clock phase .phi.2 or .phi.4.

#Waveform (c) represents a clock signal which does not have the desired phase relationship to the color burst as may occur when the phase lock system initially starts. The phase relation is arbitrary and may translate over an appreciable number of degrees before acquiring phase lock. The frequency of the clock signal of waveform (c), for convenience, is shown to be four times the color burst frequency, but this is not a necessary condition for operation of the circuitry to be described.