CMOS amplifier circuit which minimizes power supply noise coupled via a substrate
AssigneeMotorola, Inc.
InventorAlan L. Westwick
Life of this patent
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Abstract
A CMOS circuit having a differential input stage which provides a single output is provided. An output stage has a capacitor which is used as a Miller integrator coupled thereto for frequency stabilization. A cascode portion is coupled to the Miller integrator to maintain one of the capacitor's electrodes at a predetermined voltage potential. A compensation portion is coupled to the cascode portion to compensate for power supply induced errors created when either an N-channel transistor in an N-well process or a P-channel transistor in a P-well process is used in the cascode portion.
Claims8
A CMOS amplifier which minimizes power supply noise, comprising:
- a differential input stage comprising first and second transistors for respectively receiving first and second input voltages and providing a bias voltage proportional to a differential of the first and second input voltage;
- an output stage coupled to the differential input stage for providing an output signal proportional to the bias voltage;
- frequency stability means coupled to the output stage for providing frequency stabilization for the CMOS amplifier;
- cascode means coupled to the frequency stability means, for maintaining a predetermined portion of the frequency stability means at a predetermined voltage potential referenced to a ground potential, said cascode means having an error voltage signal component;
- and
- compensation means coupled to the cascode means for providing a compensation signal proportional to the error voltage signal component which cancels the error voltage signal, thereby allowing the predetermined portion of the frequency stability means to remain at the predetermined voltage potential.
In an amplifier having a differential input, an output stage with a single output, and a frequency stability capacitor and a cascode transistor, a method of minimzing power supply noise error coupled to the single output thru the cascode transistor, comprising the steps of:
- implementing the cascode transistor as a transistor of a first conductivity type with current electrodes formed in a substrate of a second conductivity type;
- and
- coupling compensation means to the cascode transistor for variably biasing the cascode transistor to maintain a predetermined voltage referenced to a ground potential at an electrode of the frequency stability capacitor regardless of variations in power supply voltage.
An amplifier which minimizes power supply voltage errors coupled thru transistors via substrate material of the transistors, comprising:
- a differential input stage comprising first and second transistors of a first conductivity type for respectively receiving first and second input voltages and providing a bias voltage proportional to a differential of the first and second input voltages;
- a first current source having a first terminal coupled to a first power supply voltage terminal and a second terminal coupled to an output terminal;
- a third transistor of a second conductivity type having a first current electrode coupled to the output terminal, a second current electrode coupled to a second power supply voltage terminal, and a control electrode coupled to the bias voltage of the differential input stage;
- a second current source having a first terminal coupled to the first power supply voltage terminal, and a second terminal;
- a frequency stability capacitor having a first electrode coupled to the output terminal, and a second electrode coupled to the second terminal of the second current source;
- a fourth transistor of the first conductivity type having a first current electrode coupled to the second terminal of the second current source, a control electrode, and a second current electrode coupled to the control electrode of the third transistor;
- a first current sink having a first terminal coupled to the second current electrode of the fourth transistor, and a second terminal coupled to the second power supply voltage terminal;
- a fifth transistor of the first conductivity type having a first current electrode coupled to a reference voltage terminal, a control electrode electrode connected to a second current electrode thereof and coupled to the control electrode of the fourth transistor;
- and
- a second current sink having a first terminal coupled to the second current electrode of the fifth transistor, and a second terminal coupled to the second power supply voltage terminal.
Dependencies are inferred from the claim text.