Leakage regulator circuit for a field effect transistor
AssigneeHughes Aircraft Company
InventorJohn E. Eng
Life of this patent
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Abstract
A leakage regulator for use with switching power supplies which include a field effect transistor (FET) is disclosed. The leakage regulator comprises a bias circuit coupled in a feedback arrangement with the FET to provide a self-generated bias voltage. The bias circuit includes a current transformer coupled to receive a drain-source leakage current. A bias voltage is generated from the transformed leakage current and this bias voltage is applied to the FET gate to help decrease the leakage current.
Claims8
An FET bias circuit for providing a bias voltage to an FET having a gate, a source and a drain to reduce drain-source leakage current in said FET, said circuit comprising:
- a current transformer, coupled in series with said FET, for generating said bias voltage in response to the leakage current;
- and
- means for coupling said bias voltage from said generating means to said FET gate.
A method for reducing drain-source leakage current in an FET having a gate, a source and a drain, comprising the steps of:
- generating a bias voltage in response to the leakage current using a current transformer coupled in series with said FET to receive the drain-source leakage current;
- and
- applying said bias voltage to said gate of said FET.
Dependencies are inferred from the claim text.