Process for making a double wafer moated signal processor

The method of forming a multiwafer integrated circuit for abutting electrical connection to external electronics comprising:

• forming a plurality of grooves in the surface of each of first and second wafers, each of said wafers having a length and a thickness, said grooves extending a portion of the thickness of each of the wafers;
• filling the grooves formed in said first and second wafers with a body of insulating material;
• forming doped regions on the first surface of said first wafer;
• selectively applying conductive leads upon the first surface of said first wafer, said conductive leads being in electrical communication with the doped regions, at least one of said conductive leads extending across at least a portion of a groove formed in said first wafer;
• depositing a first layer of insulating material along the first surface of said first wafer to cover exposed surfaces of said conductive leads and said doped region;
• joining said first and second wafers along the first surfaces thereof;
• thinning said first wafer so that the grooves formed therein extend the entire thickness of said first wafer;
• thinning the second wafer so that the grooves formed therein extend the entire thickness of the second wafer;
• trimming the length of said first and second wafers so that lengthwise edges of the first and second wafers are defined by the grooves formed therein, and at least one of said conductive leads is exposed at a lengthwise edge of said wafer;
• and
• depositing conductive material along at least one lengthwise edge of the wafers, said conductive material being in electrical communication with the exposed conductive lead and effective to facilitate electrical communication between the doped regions and external electronics.