US 4,780,759 A · Sampling clock generation circuit of video signal

Abstract

A recording apparatus receives a video signal containing a horizontal sync signal and a data signal comprised of a given number of image bit data arranged within each horizontal scanning period, and stores the number of image bit data in synchronization with the horizontal sync signal. A voltage-controlled oscillator produces in synchronization with the horizontal sync signal a frequency signal having a frequency higher than that of the sync signal. A divider frequency-divides the frequency signal by a given factor to produce a number of sampling pulses corresponding to the given number of image bit data. A data sampling circuit receives the data signal for sampling therefrom the number of image bit data in response to the corresponding sampling pulses to thereby write the image bit data into memory. Another divider frequency-divides the frequency signal by the product of the given factor and the given number to produce a feedback signal. A comparator compares the phase of the feedback and sync signals with each other to produce a control signal effective to maintain the VCO to continuously produce the frequency signal synchronized with the horizontal sync signal.

Claims11

Dependent claims

In a recording apparatus for receiving video signals containing image bit data from a display device and recording said image bit data in response to sampling clock pulses, a sampling clock generation circuit comprising:

a phase comparison circuit for receiving horizontal sync signals or composite sync signals;
a loop filter for receiving output signals of said phase comparison circuit;
a VCO for receiving output signals of said loop filter;
a first frequency divider for receiving output signals of said VCO and providing output signals to said phase comparison circuit;
and a second frequency divider for receiving output signals of said VCO and for generating sampling clock pulses, said first frequency divider having a frequency division ratio which is the product of a given number of the image bit data contained in the video signal within one horizontal period and the frequency division ratio of said second frequency divider.

2 more elements

Dependencies are inferred from the claim text.

Sampling clock generation circuit of video signal

Life of this patent

Sampling clock generation circuit of video signal

Life of this patent

Abstract

Claims11