High precision capacitance bridge
AssigneeAndeen-Hagerling, Inc.
InventorsCarl G. Andeen, Carl W. Hagerling
Life of this patent
Estimating the term…
Abstract
A capacitance measuring device and method including a ratio transformer, a reference capacitor(s), and multiplying digital to analog converters connected to form a bridge, the converter being adjustable to at least partially balance the bridge. The bridge can further include a 90.degree. phase shifter and reference capacitors to balance the real part of the unknown impedance. An internal calibration scheme calibrates various components of the bridge.
Claims32
A ratio transformer bridge comprising:
- a circuit for balancing the resistive component of an unknown impedance, said circuit comprising:
- voltage ratio transformer means;
- 90 degree phase shifter means comprising an output terminal connected to energize said ratio transformer means;
- reference capacitor means for providing at least one known value of capacitance;
- and
- means for adjusting the amplitude of the signal jointly produced by the 90 degree phase shifter means and the reference capacitor means to generate a signal which balances a signal from the resistive component of the unknown impedance.
A ratio transformer bridge comprising:
- a circuit for balancing the resistive component of an unknown impedance, said circuit comprising:
- a voltage ratio transformer;
- 90 degree phase shifter means comprising:
- a first 90 degree phase shifter;
- a second 90 degree phase shifter;
- an adder circuit comprising a plurality of inputs and an output;
- means for connecting the input of said first 90 degree phase shifter to said ratio transformer;
- means for selectively connecting the output of said first 90 degree phase shifter to the input of said second 90 degree phase shifter;
- means for connecting the output of said second 90 degree phase shifter to one input of said adder circuit, and means for selectively connecting said ratio transformer to another input of said adder circuit;
- at least one of said 90 degree phase shifters comprising means for adjusting phase shift and gain thereof;
- phase sensitive detector means connected to the output of said adder circuit for providing a null indication if the sum of the phase shifts of said first and said second phase shifters is equal to 180 degrees, and the product of the gains of said first and second phase shifters is equal to a predetermined value;
- and
- means for controlling said means for adjusting to achieve an optimum null indication by said detector means;
- reference capacitor means for providing at least one known value of capacitance;
- and
- means for adjusting the amplitude of the signal jointly produced by the 90 degree phase shifter means and the reference capacitor means to generate a signal to balance the bridge against a signal from the loss component of the unknown impedance.
A bridge for balancing an unknown impedance, said bridge comprising:
- ratio transformer means having a number of voltage divisions and a number of taps corresponding to the divisions,
- SSMDAC means comprising a plurality of inputs and means for selectively connecting said inputs to said ratio transformer means;
- a set of reference capacitors having a range of capacitance values;
- and
- switching means for selectively connecting one or more capacitors of said set of capacitors to the output of said SSMDAC;
- said SSMDAC means comprises:
- first SSMDAC means connected to said ratio transformer means for generating an in-phase output;
- second SSMDAC means;
- 90 degree phase shifter means connected to said second SSMDAC means, said second SSMDAC means generating a quadrature output signal;
- and
- adder means connected to said first and second SSMDAC means for receiving said in-phase and said quadrature output signals and for generating an output that is the sum of these outputs.
A ratio transformer bridge comprising:
- a SSRTMDAC comprising:
- a voltage ratio transformer comprising:
- a reference terminal, a plurality of ordered positive terminals that provide signals of a first polarity with respect to said reference terminal, and at least one negative terminal that provides signals of a polarity opposite to said first polarity;
- a summing circuit comprising:
- a plurality of input terminals;
- a summing point terminal;
- an output terminal;
- a corresponding plurality of resistors coupled respectively between said input terminals and said summing point terminal;
- and
- an operational amplifier comprising:
- an amplifier input terminal coupled to said summing point terminal and further comprising an amplifier output terminal coupled to said summing circuit output terminal;
- and
- switching means for selectively and individually connecting each of said input terminals to said reference terminal, to said positive terminals and to a negative terminal of said ratio transformer;
- means for energizing said ratio transformer;
- reference capacitor means;
- a detector circuit comprising:
- a first detector terminal coupled to a common terminal of said reference capacitor means;
- and a second detector terminal coupled to said reference terminal;
- means for coupling said output terminal to another terminal of said reference capacitor means;
- first and second unknown terminals for selective connection to a device under test;
- means responsive to output signals of said detector circuit for generating signals for controlling said switching means;
- means for selectively measuring parameters of operation of said SSRTMDAC;
- means for storing indicia representative of said measured parameters;
- and
- means responsive to the states of the switches of said switching means and to stored data and said indicia for calculating the value of the device under test.
A ratio transformer bridge comprising:
- an in-phase SSRTMDAC;
- a quadrature phase SSRTMDAC;
- each SSRTMDAC comprising:
- a voltage ratio transformer comprising:
- a reference terminal, a plurality of ordered positive terminals that provide signals of a first polarity with respect to said reference terminal, and at least one negative terminal that provides signals of a polarity opposite to said first polarity;
- a summing circuit comprising:
- a plurality of input terminals;
- an output terminal;
- and
- a corresponding plurality of resistors respectively coupled between said input terminals and said output terminal;
- and
- switching means for selectively and individually connecting each of said input terminals to said reference terminal, to said plurality of positive terminals and to a negative terminal of said ratio transformer;
- means for energizing the ratio transformer of said in-phase SSRTMDAC with an in-phase signal;
- means for energizing the ratio transformer of said quadrature phase SSRTMDAC with a signal having a phase differing from the phase of said in-phase signal by essentially 90 degrees;
- reference capacitor means;
- means for coupling said output terminals of said in-phase and said quadrature phase SSRTMDAC's to said reference capacitor means;
- a phase sensitive detector circuit comprising a first detector terminal coupled to a common terminal of said reference capacitor means and a second detector terminal coupled to said reference terminal;
- first and second unknown terminals for selective connection to a device under test;
- said first unknown terminal connected to a negative terminal of said ratio transformer of said in-phase SSRTMDAC and said second unknown terminal coupled to said first detector terminal;
- means responsive to output signals of said detector circuit for generating signals for controlling said switching means;
- means for calculating the value of the device under test.
A ratio transformer bridge comprising:
- an in-phase SSRTMDAC;
- a quadrature phase SSRTMDAC;
- each SSRTMDAC comprising:
- a voltage ratio transformer comprising:
- a reference terminal, a plurality of positive terminals that provide signals of a first polarity with respect to said reference terminal, and at least one negative terminal that provides signals of a polarity opposite to said first polarity;
- a summing circuit comprising:
- a plurality of input terminals and an output terminal, said summing circuit providing a fixed discrete gain from an essentially ordered range of gains between each input terminal and said output terminal;
- and
- first switching means for selectively connecting said input terminals to said ratio transformer terminals;
- means for energizing the ratio transformer of said in-phase SSRTMDAC;
- 90 degree phase shifting circuit means for energizing the ratio transformer of said quadrature phase SSRTMDAC;
- said 90 degree phase shifting circuit means comprises:
- first and second 90 degree phase shifters and second switching means for selectively connecting said phase shifters in series to form a calibration mode and in parallel with one and another to form a normal mode;
- reference capacitor means;
- means for coupling said output terminals to said reference capacitor means;
- a phase sensitive detector circuit comprising a first detector terminal coupled to a common terminal of said reference capacitor means and a second detector terminal coupled to said reference terminal;
- first and second unknown terminals for selective connection to a device under test;
- said first unknown terminal connected to a negative terminal of said ratio transformer of said in-phase SSRTMDAC and said second unknown terminal coupled to said first detector terminal;
- means responsive to output signals of said detector circuit for generating signals for controlling said first switching means;
- means for calculating the value of the device under test.
A ratio transformer bridge for balancing an unknown impedance, said bridge comprising:
- first balancing means for generating an in-phase balancing signal comprising:
- a first voltage ratio transformer, in input terminal and an output terminal;
- second balancing means for generating a quadrature phase balancing signal comprising:
- a second voltage ratio transformer, an input terminal and an output terminal;
- means for generating first and second energizing signals for energizing said first and said second ratio transformers;
- the phase of said second energizing signal differing from the phase of said first energizing signal by essentially 90 degrees;
- reference capacitor means;
- means for coupling said output terminals to one terminal of said reference capacitor means;
- a detector circuit comprising a first detector terminal coupled to a second terminal of said reference capacitor means and a second detector terminal coupled to a reference terminal;
- first and second unknown terminals for selective connection to a device under test;
- means responsive to output signals of said detector circuit for generating signals for controlling said first and second balancing means;
- and
- means for calculating the value of the device under test.
A ratio transformer bridge for balancing an unknown impedance, said bridge comprising:
- first balancing means for generating an in-phase balancing signal comprising an input terminal and an output terminal;
- second balancing means for generating a quadrature phase balancing signal comprising an input terminal and an output terminal;
- means for energizing said first balancing means;
- 90 degree phase shifting circuit means for energizing said second balancing means comprising:
- two 90 degree phase shifting circuits and switching means for selectively connecting said phase shifting circuits in series to form a calibration mode and in parallel with one and another to form a normal mode;
- reference capacitor means;
- means for coupling said output terminals to one terminal of said reference capacitor means;
- a detector circuit comprising a first detector terminal coupled to a second terminal of said reference capacitor means and a second detector terminal coupled to a reference terminal;
- first and second unknown terminals for selective connection to a device under test;
- means responsive to output signals of said detector circuit for generating signals for controlling said first and second balancing means;
- and
- means for calculating the value of the device under test.
Dependencies are inferred from the claim text.