I/O module with multi-function integrated circuits and an isolation interface for multiplexing data between a main processor and I/O devices

An I/O module for coupling I/O data signals between a plurality of I/O devices on a controlled system and a main processor, wherein the I/O data signals represent the status of the I/O devices, and wherein the I/O module comprises:

• means forming an isolation interface that isolates I/O data signals coupled to or from the I/O devices from I/O data signals processed by the main processor;
• a first integrated circuit operated in a selected one of two modes of operation including a first input mode of operation and a first output mode of operation, the first integrated circuit including means for connection in one direction to the isolation interface and including means for connection in another direction for communication of I/O data signals with the main processor;
• and
• a second integrated circuit operated in a selected one of two modes of operation including a second input mode of operation and a second output mode of operation, the second integrated circuit including means for connection to the isolation interface to communicate I/O data signals with the first integrated circuit and including means for communication of I/O data signals with the I/O devices.

An I/O module for coupling I/0 data signals, representing the status of I/O devices on a controlled system, across an isolation interface between a first portion of the I/O module that communicates with the I/O devices and a second portion of the I/O module that communicates with a main processor, the I/O module comprising:

• first parallel data means in the first portion of the I/O module for holding a plurality of I/O data signals in parallel;
• second parallel data means in the second portion of the I/O module for holding a plurality of I/O data signals in parallel;
• wherein the isolation interface includes first optical coupling means or coupling I/O data addresses in one direction across the isolation interface to one of said first and second parallel data means;
• wherein the isolation interface also includes second optical coupling means for coupling I/O data as serial data across the isolation interface in a direction opposite the direction of the coupling of the I/O data addresses to the other of the said first and second parallel data means;
• and
• further comprising address generating means coupled to the first optical coupling means for transmitting a plurality of I/O data addresses thereto to cause I/O data to be transmitted serially through the second optical coupling means from one of said first and second parallel data means to the other.

An input/output integrated circuit responsive to mode select signals to function in one of four modes including a first mode in which input data signals are transmitted to an I/O data bus for transmission to a main processor, a second mode in which input signals are received from input devices, a third mode in which output data signals are received from the main processor via the I/O data bus, and a fourth mode in which output signals are transmitted to output devices, the integrated circuit comprising:

• address generating means for generating I/O data addresses;
• demultiplexing means responsive to I/O data addresses from the address generating means when the integrated circuit is operated in its first mode for loading serial input data signals into parallel data positions, said demultiplexing means also being responsive to I/O dta addresses from the address generating means when the integrated circuit is operated in its fourth mode for loading serial output data siganls into parallel positions, and said demultiplexing means being coupled to transmit input data signals to the I/O data bus for transmission to the main processor when the integrated circuit is operated in its first mode;
• output cirucit means coupled to said demultiplexing means and responsive to output data signals therefrom to transmit output signals to the output devices when the integrated circuit is operated in its fourth mode;
• input circuit means responsive to input signals from input devies to generate input data signals when the intergrated circuit is operated in its second mode;
• backplane data latch means for receiving from the I/O data bus and holding parallel output data signals when the integrated circuit is operated in its third mode;
• and
• multiplexing means coupled to the input circuit means for receiving parallel input data signals and responsive to I/O data addresses from the address generating means when the integrated circuit is operated in its second mode for transmitting parallel input data signals as serial data, sadi multiplexing means also being coupled to said backplane data latch means for receiving parallel ouput data signals, and said multiplexing means being responsive to I/O data addresses from the address generating means when the integrated circuit is operated in its third mode for sequentially transmitting parallel output data signals as serial data.

An I/O module for disposition in either one of two slots of an equipment rack and responsive to primary and secondary enabling signals in each slot, and to a high/low select signal received in one state in the first slot and received in an alternate state in the second slot to control the order of coupling of two bytes of I/O data over a byte-wide data bus that connects to both slots, the I/O module comprising:

• data latching circuitry for holding two bytes of I/O data;
• a first enabling circuit in controllling relation to the data latching circuitry, the first enabling circuit being positioned to receive the primary and secondary enabling signals and the high/low select signal in one state when the I/O module is in a first slot, and being responsive to the primary and secondary enabling signals to couple the two bytes of I/O data between the data bus and the data latching circuitry in sequence in response to the state of the high/low select signal received in the first slot;
• and
• a second enabling circuit in controlling relation to the data latching circuitry, the second enabling circuit being positioned to receive the primary and secondary enabling siganls in reverse order as compared with the first enabling circuit and being positioned to receive the enabling signals and the high/low select signal of alternate state when the I/O module is a second slot, the second enabling circuit being responsive to the primary and secondary enabling signals to couple two bytes of I/O data between the data bus and the data latching circuitry in the same sequence as the first enabling circuit.