Data processing system and method having an improved arithmetic unit

In a data processing system having a central processing unit having an arithmetic unit for processing data in response to programmed machine instructions, and

• a control store for storing microcode program instructions and responsive to a said machine instruction for implementing said machine instruction, the improvement comprising
• a reconfigurable primary arithmetic logic unit, said reconfigurable arithmetic logic unit including
• a first individually controlled reconfigurable arithmetic logic unit,
• a second individually controlled reconfigurable arithmetic logic unit, and
• a third individually controlled reconfigurable arithmetic logic unit,
• said first, second and third reconfigurable arithmetic logic units being connected in a parallel arrangement for handling input group of data, each said first, second and third reconfigurable arithmetic logic units comprising a plurality of individually controlled arithmetic logic units connected in a parallel arrangement for handling input groups of data,
• a data string manipulation circuitry for aligning data strings for processing by the primary arithmetic logic unit, and
• circuit means repsonsive to a microcode independent machine state for generating primary arithmetic logic unit control signals for internally reconfiguring said primary arithmetic logic unit and data string manipulation circuitry control signals for controlling said data string manipulation circuitry.

In a data processing system having

• a central processing unit having an arithmetic unit for processing data in response to programmed machine instructions, and
• a control store for storing microcode program instructions and responsive to a said machine instruction for implementing said machine instruction, the improvement comprising
• a reconfigurable primary arithmetic logic unit, including a plurality of individually controlled arithmetic logic units connected in a parallel arrangement for handling input groups of data,
• a data string manipulation circuitry for aligning data string for processing by the primary arithmetic logic unit,
• circuitry responsive to a microcode independent machine state for generating primary arithmetic logic unit control signals for internally reconfiguring said primary arithmetic logic unit and data string manipulation circuitry control signals for controlling said data string manipulation circuitry, and
• circuitry responsive to said microcode instruction for at least partially inhibiting said circuit means from responding to said machine state and for generating said control signals at least in part from said microcode instructions.

In a data processing system having a central processing unit having

• an arithmetic unit for processing data in response to programmed machine instructions, and
• a control store for storing microcode program instructions and responsive to a said machine instruction for implementing said machine instruction, the improvement comprising
• a reconfigurable primary arithmetic logic unit having,
• a first reconfigurable arithmetic logic unit,
• a second reconfigurable arithmetic logic unit, and
• a third reconfigurable arithmetic logic unit,
• each said first, second, and third reconfigurable arithmetic logic unit comprising a plurality of individually controlled arithmetic logic units connected in a parallel arrangement for handling input groups of data,
• a data string manipulation circuitry for aligning data strings for processing by said primary arithmetic logic unit,
• circuit means responsive to a microcode independent machine state for generating primary arithmetic logic unit control signals for internally reconfiguring said primary arithmetic logic unit and data string manipulation circuitry control signals for controlling said data string manipulation circuitry, and
• circuitry responsive to said microcode instruction for at least partially inhibiting said circuit means from responding to said machine state and for generating said control signals at least in part from said microcode instructions.

In a data processing system having a central processing unit employing

• a primary arithmetic logic unit including plural secondary arithmetic logic units for processing data in response to programmed machine isntructions, and
• a control store for microcode program storage responsive to a said instruction for implementing said instruction,
• a method for performing string and digit manipulations in said primary arithmetic logic unit comprising the steps of
• aligning the data to be operated upon by said instruction so that the input data strings to said primary arithmetic logic unit are aligned, and
• responding to microcode independent, instruction responsive control signals for separately internally reconfiguring each of said secondary arithmetic logic units.