Arbitration system using centralized and decentralized arbitrators to access local memories in a multi-processor controlled machine tool

In a control system having first, second and third processors which provide addresses to access stored data, each processor being coupled thorugh local address and data buses to a respective first, second and third local memory, each said local memory storing data at predefined addresses, an arbitration system for allowing any processor to access a foreign memory, a foreign memory comprising a local memory coupled with a different processor, comprising:

• first, second and third address decode means each coupled through said local address buses to said first, second and third processors, respectively, for monitoring addresses output on said local address bus to provide a foreign memory select signal if a monitored address is an address in a foreign memory, said select signals identifying the processor coupled to the foreign memory;
• means coupled to said address decode means and responsive to the foreign memory select signals from each of the three address decode means for arbitrating foreign memory access requests to allow one of said processors to access a local memory of another processor, said arbitrating means providing a foreign memory access request signal to said another processor;
• first, second and third means coupled with said first, second and third processors, respectively, and responsive to a foreign memory access request signal provided to its respective processor from said arbitrating means for providing an access grant signal to said arbitrating means if said respective processor is not using its local memory;
• and
• means included in said arbitrating means and responsive to an access grant signal from the access grant providing means coupled with said another processor to connect the local address and data buses of said another processor to transfer address data stored in the local memory of said another processor to said one processor.

In a control system having a plurality of processors and a plurality of memories, each memory being coupled to a particular processor, each said memory being a local memory relative to the processor coupled thereto and a foreign memory relative to said other processors, each said memory storing data at predefined addresses, an arbitration system enabling a user to access a foreign memory comprising:

• at least two users coupled to each memory for accessing data stored therein, each of said users providing a user access request signal when access to a memory is required, wherein at least one of said local memories is a dynamic random access memory and one of the users coupled to said dynamic random access memory is a memory control means for periodically refreshing the data stored in the dynamic random access memory;
• a plurality of local arbitration means each coupled with both a respective processor and said users and responsive to user access request signals from said users requesting access to said memory for arbitrating requests to grant one user access if the memory is not being used by said respective processor;
• and
• a plurality of address decode means each coupled with a particular processor for monitoring the addresses output by said processor to provide a foreign memory select signal if an address is in a foreign memory, said select signal identifying the processor coupled to said foreign memory;
• wherein the other of said users of memories includes a foreign memory arbitration means coupled to said address decode means and responsive to foreign memory select signals from said address decode means for arbitrating foreign memory access to allow one processor to access a foreign memory, said foreign memory arbitration means providing a user access request signal to the local arbitration means of the processor coupled to said foreign memory and responsive to an access grant signal from said local arbitration means for coupling the foreign memory to said one processor, wherein the local arbitration means coupled with the processor having the dynamic random access memory is responsive to user access request signals from said foreign memory arbitration means and from said memory control means to grant access to said memory control means to grant access to said memory control means before granting access to said foreign memory arbitration means.

In a control system having a plurality of processors and a plurality of memories, each memory being coupled to a particular processor, each said memory being a local memory relative to the processor coupled thereto and a foreign memory relative to said other processors, each said memory storing data at predefined addresses, an arbitration system enabling a user to access a foreign memory comprising:

• at least two users coupled to each memory for accessing data stored therein, each of said users providing a user access request signal when access to a memory is required;
• a plurality of local arbitration means each coupled with both a respective processor and said users and responsive to user access request signals form said users requesting access to said memory for arbitrating requests to grant one user access if the memory is not being used by said respective processor;
• and
• a plurality of address decode means each coupled with a respective processor for monitoring the addresses output by said processor to provide a foreign memory select signal if an address is in a foreign memory, said select signal identifying the processor coupled to said foreign memory;
• wherein one of said users of said memories includes foreign memory arbitration means coupled to said address decode means and responsive to foreign memory select signals from said address decode means for arbitrating foreign memory access to allow one processor to access a foreign memory, said foreign memory arbitration means providing a user access request signal to the local arbitration means of the processor coupled to said foreign memory and responsive to an access grant signal from said local arbitration means for coupling the foreign memory to said one processor, said foreign memory arbitration means including:
• a plurality of first logic means each coupled with a respective processor for providing a user access request signal when enabled;
• and
• a second logic means coupled to said address decode means and responsive to said foreign memory select signals from each of said address decode means for enabling the first logic means coupled with the respective processor.

In a control system having first, second and third processors which output addresses to access stored data, each processor being coupled through first, second and third local address and data buses to first, second and third local dynamic memories, respectively, for storing data at predefined addresses, an arbitration system for allowing one of said processors to access a foreign memory, a foreign memory comprising a local memory coupled with another processor, comprising:

• first, second and third address decoders, each coupled with said first, second and third processors, respectively, for monitoring the addresses output on said respective processor's local address bus to provide a foreign memory select signal if an address is outside of said respective processor's memory, said select signal identifying the processor coupled to a selected foreign memory;
• external arbitration means coupled to said address decoders and responsive to said foreign memory select signals from each of said address decoders for arbitrating foreign memory access to allow one processor to access the memory of another processor, said external arbitration means providing a user access request signal to request access to the memory of said another processor;
• first, second and third memory controllers coupled with said first, second and third local memories, respectively, for periodically refreshing the respective local memory coupled thereto, each of said memory controllers providing a user access request signal to gain access to the respective local memory;
• first, second and third local arbitration means coupled to said first, second and third processors, respectively, the external arbitration means, and said first, second and third memory controllers, respectively, and responsive to said user request signals for access to said processor's memory for transmitting an access request signal to said processor, each local arbitration means being responsive to the processor coupled thereto for providing a grant signal to the user having the highest priority to allow said user to access the local memory of the processor coupled thereto.