User programmable integrated circuit interconnect architecture and test method

A user-programmable array logic circuit, comprising:

• a plurality of logic modules placed on a substrate, the logic modules each having connection nodes,
• a plurality of first wiring channels running in a first direction, at least one of which is connected to at least one of said connection nodes,
• a plurality of second wiring channels running in a second direction and disposed in a layer electrically isolated from the layer containing said first wiring channels, intersecting said first wiring channels at intersections,
• a two-terminal, electrically-programmable, normally-open element joining at least one of the intersection wiring channels,
• said element being selectively programmable by the user in order to create a permanent bidirectional low-impedance electrical connection between intersecting wiring channels.

A programmable array logic circuit, comprising:

• a plurality of logic modules placed in any array, said logic modules each having connection nodes,
• a plurality of sets of wiring channels, at least one of said wiring channels is connected to at least one of said connection nodes, each set of wiring channels having at least one wiring channel comprising at least two wiring segments, at least one said wiring channels being in a direction substantially non-parallel to other ones of said wiring channels,
• the wiring segments of at least one of the wiring channels being joined in series by series-pass transistors,
• at least two of said wiring segments of each wiring channel being joined in series by a normally-open, electrically programmable element,
• at lest two of said wiring segments that intersect each other being connected by programmable elements,
• programming circuitry connected to said series-pass transistors capable of selectively biasing said series-pass transistors to cause them to conduct or not to conduct.

In a programmable array logic circuit comprising a plurality of logic modules placed in an array, said logic modules each having connection nodes, a plurality of sets of wiring channels, at least one of said wiring channels connected to at least one of said connection nodes, each set of wiring channels having at least one wiring channel comprising at least two wiring segments, the wiring segments of at least one of the wiring channels being joined in series by series-pass transistors, at least two of said wiring segments of each wiring channel being joined in series by a normally-open, electrically programmable element, at least two of said wiring segments that intersect each other being connected by programmable elements, programming circuitry connected to the control elements of said series-pass transistors capable of selectively biasing said series-pass transistors to cause them to conduct or not to conduct, a method of programming a selected programmable element, comprising the steps of:

• (a) preselecting a group of series-pass transistors to be biased to conduct such that a first complete current path will exist from a source of a first potential to one end of said selected programmable element and a second complete current path will exist from a source of a second potential to the other end of said selected programmable element when said preselected series-pass transistors are biased,
• (b) biasing said group of series-pass transistors to conduct, and
• (c) applying said first potential to the end of said first current path furthest from said programmable element and applying said second potential to the end of said second current path furthest from said programmable element, in order to program said selected programmable element not bypassed by a conducting series-pass transistor, thereby creating a permanent bi-directional low-impedance electrical connection between wiring segments at the location of said selected programmable element.

In an integrated circuit, an electrically programmable interconnect architecture, comprising:

• a plurality of modules placed in an array, the modules having connection nodes,
• a plurality of sets of wiring channels, each set of wiring channels having at least one wiring channel comprising at least two wiring segments and wherein at least one of said wiring segments is connected to one of said connection nodes,
• a plurality of normally-open, electrically-programmable elements, each of said elements located between selected ones of said wiring segments, said programmable elements being characterized by a high impedance before programming and being selectively programmable by the user in order to creat a bidirectional low-impedane electrical connection between wiring segments,
• series-pass transistors connected between selected ones of said wiring segments, each of said series-pass transistors having a control element,
• selection circuitry connected to said control elements of each of said series-pass transistors.

In an integrated circuit, an electrically-programmable interconnect architecture, comprising:

• a plurality of function modules, having connection nodes,
• a plurality of wiring channels, selected ones of said wiring channels being arranged as at least two wiring segments, at lease one of said wiring segments being connected to one of said connection nodes,
• a plurality of electrically-programmable elements, connected between selected ones of said wiring segments,
• series-pass means, connected in parallel with selected ones of said electrically-programmable elements, for temporarily causing electrical connections between said wiring segments to which they are connected,
• selection means for providing signals to said series-pass means, to cause a said series-pass means to temporarily conduct.