Sample clock signal generator circuit

Apparatus comprising

• means for receiving a repetitive primary signal of a predetermined frequency from a signal generator.
• means for receiving an external signal from a source of signals,
• means responsive to receipt of said primary signal for generating a series of time-separated signals and respective addresses from said primary signal, and
• means responsive to receipt of said external signal and said primary signal for generating a signal having a predetermined transition synchronized with a predetermined transition of said primary signal and for outputting to a terminal that one of said series of signals whose respective address occurs during said synchronized transition.

Apparatus for generating a sample clock signal, said sample clock signal having a predetermined frequency and being phase synchronized with an external signal, said apparatus comprising

• means for receiving said external signal,
• means for receiving frequency programming instructions from an external source of such instructions and for generating a first signal having a frequency defined by said instructions, said frequency of said first signal being a predetermined multiple of the frequency of said sample clock signal,
• means responsive to said first signal for generating a second signal and a series of addresses,
• means responsive to said first and second signals for generating a series of time-separated signals each having a frequency substantially equal to the predetermined frequency of said sample clock signal, said series of timeseparated signals being associated with respective ones of said addresses, and
• means responsive to said external signal for generating a signal substantially a replica of said external signal and having a trailing transition synchronized with a predetermined transition of said first signal and for outputting as said sample clock signal that one of said series of signals whose respective one of said addresses occurs during said trailing transition.

A method of generating a signal having a predetermined frequency and phase synchronized with an external signal comprising the steps of,

• receiving said external signal,
• generating a primary signal,
• generating a series of signals, each of said series of signals having a frequency substantially equal to said predetermined frequency,
• generating a series of adresses associated with respective ones of said series of signals,
• generating an address electing signal as a function of said external signal and said primary signal, and
• outputting as said phase-synchronized signal that one of said series of signals whose respective one of said addresses occurs during a predetermined transition of said address selecting signal.