US 4,753,895 A · Method of forming low leakage CMOS device on insulating substrate

Abstract

A method of fabricating CMOS circuit devices on an insulator substrate is disclosed in which a solid phase epitaxy process is applied to islands for the individual devices in the same step as the channel dopant implants. An ion species, preferably silicon for a silicon island, is implanted into each island at an energy and dosage sufficient to amorphize a buried layer of the island in the vicinity of an underlying insulated substrate; silicon-on-sapphire (SOS) is preferably employed. The buried layers are then recrystallized, using the unamorphized portions of the semiconductor islands as crystallization seeds. Islands of generally uniform, high quality semiconductor material are thus obtained which utilize dopant implants more efficiently, and avoid prior parasitic transistors and leakage currents. By implanting the ion species to a greater depth than the nominal island thickness for n-channel devices, and to a lesser depth than the nominal island thickness for p-channel devices, back channel current leakage is reduced while undesirable aluminum auto doping is avoided for the p-channel devices.

Claims18

Dependent claims

A method of fabricating a pair of islands for a pair of semiconductor devices, comprising:

(a) forming a thin semiconductor layer on an insulator substrate,
(b) forming a pair of islands from the semiconductor layer, and
(c) implanting the islands by:
(1) implanting an ion species into each island at an implant energy and dosage sufficient to amorphize a buried layer of each island in the vicinity of the insulator substrate, the ion species being implanted to a greater depth than the nominal island thickness for an n-channel island, and to a lesser depth than the nominal island thickness for a p-channel island, and thereafter
(2) implanting a p-type dopant into one of the islands and an n-type dopant into the other island to form n-channel and p-channel devices, respectively,
(3) regrowing the amorphous buried layers so as to form recrystallized buried layers using the unamorphized portions of the semiconductor islands as crystallization seeds, and
(4) activating the p- and n-type dopants.

4 more elements

A method of fabricating a complementary pair of field effect transistors (FETs), comprising:

forming a thin semiconductor layer on an insulator substrate,
etching first and second islands from the semiconductor layer,
implanting an ion species into each island at an implant energy and dosage sufficient to amorphize a buried layer of each island in the vicinity of the insulator substrate, the ion species being implanted to a greater depth than the nominal island thickness for an n-channel island and to a lesser depth than the nominal island thickness for a p-channel island, thereafter
masking the second island and implanting a first dopant of one polarity into the first island,
masking the first island and implanting a second dopant of opposite polarity to the first dopant into the second island,
performing a first anneal on the islands at a first temperature which is sufficient to regrow the amorphous buried layers so as to form recrystallized buried layers using the unamorphized portions of the islands as crystallization seeds,
performing a second anneal on the islands at a second temperature whic is higher than the first temperature and sufficient to activate the dopants, and
forming insulative and conductive gate layers and performing source and drain implants on the islands to complete the FETs.

5 more elements

Dependencies are inferred from the claim text.

Method of forming low leakage CMOS device on insulating substrate

Life of this patent

Method of forming low leakage CMOS device on insulating substrate

Life of this patent

Abstract

Claims18