Self-aligned contacts for bipolar process
AssigneeHarris Corporation
InventorBruce A. Beitman
Life of this patent
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Abstract
A process for manufacturing a bipolar semiconductor device having self-aligned contact regions. The process avoids the need for a masking step for the application of interconnecting contacts by providing a dielectric material having a low melting point over the emitter region of the semiconductor. The dielectric material is heated to its melting point such that it covers and encapsulates the emitter. Conductive contact material is then subsequently provided using the self-alignment feature of the melted dielectric which isolates the base from the contacts.
Claims20
A process of manufacturing a semiconductor device comprising:
- (a) providing a substrate having a first surface;
- (b) providing a first dielectric layer over said first surface of said substrate;
- (c) selectively removing a portion of said first dielectric layer and exposing a selected area of said substrate;
- (d) providing a first conductive layer over said first dielectric layer and said exposed substrate;
- (e) providing a second dielectric layer over said first conductive layer;
- (f) patterning said second dielectric layer, and using said dielectric layer as a mask for patterning said first conductive layer;
- (g) patterning said first conductive layer and exposing side surfaces of said first conductive layer;
- (h) heating said second dielectric layer to a predetermined temperature such that said second dielectric layer flows and covers said side surfaces of said first conductive layer;
- (i) removing said first dielectric layer from a contact area;
- and
- (j) providing a second conductive layer to said contact area.
A process for forming a bipolar semiconductor wafer comprising the steps of:
- (a) providing a substrate of a first conductivity type;
- (b) selectively forming a plurality of field oxide regions on a first surface of said substrate such that an active region is defined between said field oxide regions, wherein said first surface of said substrate is exposed in said active area region;
- (c) providing a base region of a second conductivity type in said substrate within substantially said active region;
- (d) selectively forming a thin oxide layer on a portion of said first surface of said substrate in said active region such that an emitter region is defined between said thin oxide layer, wherein said first surface of said substrate is exposed in said emitter region;
- (e) providing a polycrystalline silicon layer over said thin oxide layer and said exposed first surface of said substrate;
- (f) providing a first dielectric layer over said polycrystalline silicon layer, wherein said dielectric layer flows when heated to a preselected temperature;
- (g) selectively removing said first dielectric layer and exposing selected areas of said polycrystalline silicon layer;
- (h) selectively removing said exposed regions of said polycrystalline layer and exposing selected areas of said thin oxide layer, wherein side surfaces of said polycrystalline layer are exposed as a result of said removal of said exposed regions thereof;
- (i) heating said dielectric layer to said preselected temperature for causing said dielectric layer to flow and cover said exposed side surfaces of said polycrystalline layer;
- (j) selectively removing said exposed thin oxide and exposing said first surface of said substrate;
- and
- (k) selectively providing a second conductive layer over said exposed portions of said substrate.
Dependencies are inferred from the claim text.